Use of stm32 watchdog

Why use a watchdog

The matter is very simple. A data collection product I made before was abnormal for some reason, fell into an infinite loop and then "frozen". After analyzing it many times, I couldn't find the reason, but every time I restarted it, I could collect data normally. Later I found a solution: watchdog! The purpose is to automatically reset when the program enters an infinite loop or the hardware is abnormal, so that you can get the same effect as after restarting the power.

The platform I use: stm32f103 series microcontroller

The burning and debugging mode used is Jlink SWD mode.

Use the STM32 official template library.

There are two types of ST series microcontroller watchdogs:

1. Independent watchdog, 2. Window watchdog.

Independent watchdog:

See Independent watchdog (IWDG) in the RM (reference Manual)

Of course, just take a brief look at the introduction in RM (as for the operation of registers, we can skip it because we use library development, but the basic process must be understood!).

Here we have to grasp a few key points:

a. The stm32f10x series has two watchdogs. The watchdog is mainly used to detect problems caused by software errors and trigger the system to automatically reset or trigger an interrupt (only for window watchdogs).

b. The clock source of the independent watchdog is LSI, and it can remain activated even if the main clock fails. The clock source of the window watchdog is the APB1 clock, and the frequency division value can be modified.

c. Independent watchdog: A system fault detector with an independent clock (internal low-speed clock LSI), so it is not affected by the system hardware. It is mainly used to monitor hardware errors. The accuracy requirement is relatively low.

d. Window watchdog: The clock is the same as the system. If the system clock stops, the watchdog will lose its function. It is mainly used to monitor software errors. Higher accuracy is required.

Brief introduction to the watchdog principle: There is a register that is constantly decreasing according to the clock source (there is a dog that consumes energy continuously). When the register is 0, it will trigger a system reset (the dog will bark). In order to prevent the register from being 0, we must reset the register value on time (feed the dog). In this way, when the software works normally (feed the dog normally, the dog will not bark), constantly resetting the register will not cause a reset. If the software falls into an infinite loop and no longer resets the register (the dog will bark if it is not fed), a reset will occur.

Therefore, if we have a software that sometimes has a memory error or falls into an infinite loop, we can use an independent watchdog to reset the device.

Without further ado:

Code example: Come on, help us!

//---------------------

void IWDG_Init()

{

//Enable write access to IWDG_PR and IWDG_RLR registers

IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

//Configure the IWDG prescaler

IWDG_SetPrescaler(IWDG_Prescaler_16); //10k

//Configure the IWDG counter value

IWDG_SetReload(2500); // Bits11:0 RL[11:0]: Watchdog counter reload value ~ Only 12bit ~max value = 4096

IWDG_ReloadCounter();

IWDG_Enable();

}

//---------------------

What? How was this code written? Don't worry, let me tell you!

Since we are using the official ST library, there are a lot of documentation! Just look at the comments! As follows:

First, open any template of the official library: Use keil MDK to open the following directory

stsw-stm32062.zip\STM32F2xx_StdPeriph_Lib_V1.1.0\Project\STM32F2xx_StdPeriph_Template\MDK-ARM

Then you will see a file like the one below on the left. After a brief inspection, we will find that the function we want to use is IWDG. Therefore, it must be the file stm32f2xx_iwdg.c! (Only the library of f2xx series has comments, but not 10x. But it is almost the same, maybe there are more tutorials for 10x.

After opening it, there will be detailed introduction!

* ================================================= ==================

* How to use this driver

* ================================================= ==================

* 1. Enable write access to IWDG_PR and IWDG_RLR registers using

* IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function

*

* 2. Configure the IWDG prescaler using IWDG_SetPrescaler() function

*

* 3. Configure the IWDG counter value using IWDG_SetReload() function.

* This value will be loaded in the IWDG counter each time the counter

* is reloaded, then the IWDG will start counting down from this value.

*

* 4. Start the IWDG using IWDG_Enable() function, when the IWDG is used

* in software mode (no need to enable the LSI, it will be enabled

* by hardware)

*

* 5. Then the application program must reload the IWDG counter at regular

* intervals during normal operation to prevent an MCU reset, using

* IWDG_ReloadCounter() function.

Don't say you don't understand!

Verify the entire watchdog process as follows:

IWDG_Init();

IWDG_ReloadCounter();

printf("SysInit\r\n");

while(1)

{

Delay_us(1000);

IWDG_ReloadCounter();

printf("1000 \r\n");

Delay_us(10000);

IWDG_ReloadCounter();

printf("10000 \r\n");

Delay_us(100000);

IWDG_ReloadCounter();

printf("100000 \r\n");

Delay_us(200000);

IWDG_ReloadCounter();

printf("200000 \r\n");

Delay_us(300000);

IWDG_ReloadCounter();

printf("200000 \r\n");

Delay_us(400000);

IWDG_ReloadCounter();

printf("400000 \r\n");

Delay_us(500000);

IWDG_ReloadCounter();

printf("500000 \r\n");

Delay_us(600000);

IWDG_ReloadCounter();

printf("600000 \r\n");

Delay_us(700000);

IWDG_ReloadCounter();

printf("700000 \r\n");

Delay_us(800000);

IWDG_ReloadCounter();

printf("800000 \r\n");

Delay_us(900000);

IWDG_ReloadCounter();

printf("900000 \r\n");

Delay_us(1000000);

IWDG_ReloadCounter();

printf("1000000 \r\n");

IWDG_ReloadCounter();

Delay_us(2000000);

printf("2000000\r\n");

}

In this way, the watchdog must be fed once every 1s. Therefore, the print function with a delay of 2s will not be printed out and will be reset again.

In addition, it is important to note that:

The ReloadCounter register of the independent watchdog has only 12 bits~! This means that the maximum value is 2 to the 12th power = 4096, which must not be exceeded!

The clock of the independent watchdog is 40khz as shown above.