STM32 window watchdog principle

stm32 has two watchdogs, an independent watchdog and a window watchdog. In fact, their functions are similar, but the time limit for feeding the watchdog is different.

The independent watchdog limits the feeding time to 0-x, where x is determined by your related registers. The feeding time cannot be too late.

Window watchdog, so called window because its feeding time is within a range of upper and lower limits, you can set the upper and lower limits by setting the relevant registers. The feeding time should not be too early or too late.

figure 1

Window Watchdog

The upper window is W[6:0] set in the configuration register WWDG->CFR;

The lower window is fixed at 0x40;

When the window watchdog counter is outside the upper window value or below the lower window value, a reset will occur.

figure 2

&& The value of the upper window can only be set. The maximum value of a 7-bit binary number can only be set to 127 (0x7F), and the minimum value must be greater than 0x40 of the lower window, so its value range is 64~127 (i.e.: 0x40~0x7F);

&& Set the clock division factor for the counter in the configuration register WWDG->CFR to determine the time range that the counter can be timed, thereby determining the time range of the window.

&& The clock of the window watchdog comes from PCLK1. In the clock configuration, its frequency is the two-frequency clock of the external clock after the multiplier, that is, 36MHz. According to the manual, we can know the timing time calculation method:

Upper window time: T_min = 4096 * (2^WDGTB)*(WWDG_CR[6:0] - WWDG_CFR[6:0])/36 (us)

 Lower window time: T_max = 4096 * (2^WDGTB)*(WWDG_CR[6:0] - 0x40)/36 (us)

The feeding time range of the watchdog in the relevant window at 36Mhz is:

WDGTB (counter frequency division value) Earliest feeding time/us Latest feeding time/ms

0 113 7.28

1 227 14.56

2 455 29.12

3 910 58.25