1. ADS1232 Overview
ADS1232 is a high-precision, low-rate ADC launched by TI in the early days. Its performance parameters are as follows
• 24-bit Σ-Δ dual differential analog input ADC, complete bridge sensor front end
• Up to 23.5 effective bits
• Low-noise PGA, 19.2-bit noise-free resolution (PGA = 64)
• Simultaneously suppresses 50 Hz/60 Hz, 10sps or 80sps data rates
•Power supply range: 2.7V to 5.3v
It is very cost-effective and is very suitable for testing static variables, such as electronic scales, strain gauges, pressure sensors, industrial process control and other applications. I have done a comparative test on ADS1232 and would like to share the test results.
2. Hardware Design Analysis
From the structure diagram, we can see that ADS1232 is an ADC with completely independent analog and digital areas. According to the official guidance document, the two areas need to be wired and isolated independently to achieve the best signal-to-noise ratio. In addition, a reliable reference voltage is the lifeblood of a high-precision ADC. In this test, TI's REF5025 was selected as the reference. REF5025 can be lower than 3µVpp/V noise and 3ppm/°C drift, and its performance is excellent.
Since I often work on high-frequency projects, I hate the DuPont line/flying line test method. In the field of high precision, the 24-bit ADC gradient value 2 is 2416777216. If the reference voltage is 2.5v, the theoretical resolution can reach 0.149μV. Engineers who have worked on high-frequency projects are well aware of the disadvantages of DuPont lines. According to the above technical analysis, even if the line is introduced with 1μV interference, the accuracy can be discounted to a certain extent. In order to fully reflect the performance of ADS1232, a test carrier board was specially made. The carrier board design is also critical. While dividing the analog and digital areas, a large number of tantalum capacitors are used as bypass circuits in the connection area to minimize the ripple. Reasonable layout and wiring are also critical. The copper-clad area also needs analog-to-digital separation, separated by magnetic beads or 0-5R/inductors.
3. Timing diagram explanation
From the timing diagram, we can see that ADS1232 reading and writing is a simple serial reading method, similar to IIC reading, and the timing implementation is relatively simple. With the rising edge as the sign, the value of the 23rd bit is read on the rising edge of SCLk (big endian mode), and so on.
4. Core source code
unsigned long AD_read(void)
{
int i=0;
unsigned long ad_value=0;
SCLK_L;
PDWN_L;
delay_us(10);
A0_L;
SPEED_H;
PDWN_H;
delay_us(20);
while(GPIO_ReadInputDataBit(ADPORT_B,DOUT)==1);//data update
for(i=0;i<24;i++)
{
ad_value=ad_value<<1;
SCLK_H;
delay_us(2);
if(GPIO_ReadInputDataBit(ADPORT_B,DOUT)==1)
{
ad_value|=0x00000001;
}
SCLK_L;
delay_us(2);
}
SCLK_H;
delay_us(2);
SCLK_L;
delay_ms(1);
return ad_value;
}
5. Test results
The test source is the voltage value after AVDD resistor division. Through the analysis of the error curve, the swing is stable at ±6µV, which is very ideal and can meet the noise output standard of the official manual (see the figure below).
6. Conclusion
As a low-speed, high-precision ADC, ADS1232 is a good choice. Its high cost-performance ratio and excellent performance make it very competitive among ADCs of the same level. Welcome to exchange technology with us, QQ: 1625874998, some information can be provided for your design reference.
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