STM32F407 About TIM1 output PWM

Enable OCx output through the combination of CCxE, CCxNE, MOE, OSSI and OSSR bits (TIMx_CCER and TIMx_BDTR registers). In fact, the MOE and AOE bits of the TIMx_BDTR register need to be set to 1. This is different from the normal configuration of PWM output. The code is as follows↓

/*******************************************************************
* Function:   
* Author: Jahol Fan  
* Parameters:  
* Return value:   
* Others: PA9 PWM output controls the speed, PA9's multiplexed function 1 is TIM1_CH2,
             TIM1: 168MHZ
***********************************************************************/
void TIM1_PwmInit(u16 psc,u16 arr)
{
    GPIO_Init(GPIOA,PIN9,GPIO_MODE_AF,GPIO_OTYPE_PP,GPIO_SPEED_100M,GPIO_PUPD_PU);
    GPIO_AFSet(GPIOA,9,1); //PA9, AF1 
    RCC->APB2ENR |= 1<<0;//Enable timer 1 clock
    TIM1->CR1 |= 1<<7;//Use TIM1_ARR Shadow register of register
    TIM1->CR1 &=~(1<<3);//Select timing mode: cyclic timing
    TIM1->CR1 &=~(1<<2);//Select update event source: counter overflow or UG position 1 can generate update event
    TIM1->CR1 &=~(1<<1);//Enable update event generation
    TIM1->PSC = psc-1;//Set prescaler value
    TIM1->ARR = arr-1;//Set ARR auto-reload value (upper limit).
    TIM1->CCMR1 &=~(7<<12); //Clear
    TIM1->CCMR1 |= 6<<12;//Set to PWM mode 1
    TIM1->CCMR1 |=(1<<11);//Enable shadow register of TIM1_CCR2
    TIM1->CCMR1 &=~(3<<8);//Timer channel is configured as output.
    TIM1->CCER |=(1<<5);//Configure the effective level of the timer channel to be low level
    TIM1->CCR2 = arr/2;//Set the value of CCR2.
    TIM1->BDTR |= 1<<15;//Master output enable
    TIM1->BDTR |= 1<<14;//MOE can be set to 1 by software, or automatically set to 1 when the next update event occurs (if the circuit breaker input is invalid)
    //TIM1->BDTR |= 1<<10;
    //TIM1->BDTR |= 1<<11;
    TIM1->EGR |= 1<<0;//UG position 1, actively generate update events, purpose: initialize registers including updating shadow registers.
    TIM1->SR = 0;//Clear the status flag
    TIM1->CCER|=1<<4;//Turn on PWM output
    TIM1->CR1 |= 1<<0;//Enable counter
}