STM32F4XX efficient driver part 2 I2C

Publisher:seanxnieLatest update time:2016-12-08 Source: eefocusKeywords:STM32F4XX Reading articles on mobile phones Scan QR code
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When it comes to I2C, many engineers who have used the STMF10X hardware I2C method feel a bit of a headache. Most of them still use software simulation. Since the general operating frequency of I2C is 400,100KHz, when reading ordinary data or reading a large amount of data, using this simulation method still wastes the effective working time of the CPU.

         In my previous experience of using I2C, the I2C deadlock problem troubled me for a while. However, after reading a lot of information, I finally solved this problem. The following driver has integrated this function.

   What is deadlock? During the reading and writing operation of the I2C master device, the master device controls SCL to generate 8 clock pulses after the start signal, and then pulls the SCL signal to a low level. At this time, the slave device outputs a response signal and pulls the SDA signal to a low level. If the master device is abnormally reset at this time, SCL will be released to a high level. At this time, if the slave device is not reset, it will continue to respond to I2C and pull SDA to a low level until SCL becomes a low level, and then the response signal will end. For the I2C master device, after the reset, the SCL and SDA signals are detected. If the SDA signal is found to be a low level, it will be considered that the I2C bus is occupied, and it will wait for the SCL and SDA signals to become high levels. In this way, the I2C master device waits for the slave device to release the SDA signal, and at the same time, the I2C slave device is waiting for the master device to pull the SCL signal low to release the response signal. The two wait for each other, and the I2C bus enters a deadlock state. Similarly, when I2C performs a read operation, the I2C slave device responds and outputs data. If the I2C master device is abnormally reset at this moment and the data bit output by the I2C slave device is exactly 0, the I2C bus will also enter a deadlock state.

To solve the deadlock problem, I mainly summarize two points:

1. Connect the reset pins of MCU and I2C slave. (Ensure simultaneous reset)

2. Perform software reset as described in Figure 1.

figure 1:

 

If the chip you choose meets the following timings, you can use this driver.

figure 2:

 

Here is an explanation of this driver. The main driver mainly uses interrupts to send data. The official program uses DMA. It is better to use DMA when transferring large amounts of data. The interrupt method is used here mainly for the convenience of operation. If small amounts of data are transferred, the interrupt method is more efficient.

Turn on I2C

void BSP_I2cOpen(uint8_t I2C_x, uint32_t clockSpeed);

Turn off I2C

void BSP_I2cClose(uint8_t I2C_x);

Write data to the I2C slave device

uint32_t BSP_I2cWrite(uint8_t I2C_x, uint8_t *buff, uint16_t i2cSaleAddress, uint8_t writeAddress, uint16_t writeLen);

Reading data from an I2C slave device

uint32_t BSP_I2cRead(uint8_t I2C_x, uint8_t *buff, uint16_t i2cSaleAddress, uint8_t readAddress, uint16_t readLen);

Read I2C bus idle status

uint32_t BSP_I2cIdleState(uint8_t I2C_x);


Keywords:STM32F4XX Reference address:STM32F4XX efficient driver part 2 I2C

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