The use of PWM and timer of S3C2440

  There are 5 16-bit timers in the s3c2440 chip, 4 of which (timer 0 to timer 3) have pulse width modulation function, that is, they all have an output pin, and the timer can be used to control the periodic high and low level changes of the pin. Timer 4 has no output pin. This was used in the last offline PWM test program experiment, so this time we will study PWM and timers together.

       The clock source of the timer component is PCLK, which is first reduced in frequency through two 8-bit prescalers. Timers 0 and 1 share the first prescaler, and 2, 3, and 4 share the second prescaler. The output of the prescaler is connected to the second-level divider, which can generate 5 divided signals (1/2, 1/4, 1/8, 1/16, TCLK). The 8-bit prescaler is programmable and divides PCLK according to the load value, which is stored in TCFG0 and TCFG1.

       The internal control logic workflow of the timer is as follows:

1. At the beginning of the program, set the two registers TCMPBn and TCNTBn to represent the comparison value and initial count value of timer n respectively.

       2. Then set the TCON register to start timer n. At this time, the values ​​of TCMPBn and TCNTBn will be loaded into the internal registers TCMPn and TCNTn. At the working frequency of timer n, TCNTn starts to count down by 1, and its value can be obtained by reading TCNTOn.

       3. When the TCNTn value is equal to the TCMPn value, the output pin TOUTn of timer n is reversed; TCNTn continues to count down by 1.

       4. When the TCNTn value is 0, the output pin TOUTn reverses again and triggers the timer n interrupt (interrupt enabled).

       5. When the TCNTn value is 0, if timer n is set to auto-load in the TCON register, the TCMPBn and TCNTBn values ​​will be automatically loaded into the internal registers TCMPn and TCNTn, and enter the next counting process.

       The output pin TOUTn of timer n is initially high, and then reverses twice. You can also set its initial level through the TCON register, so that the output is completely inverted. By setting TCMPBn and TCNTBn, you can set the duty cycle of the TOUTn output signal, which is the so-called PWM. The principle of PWM will not be introduced here.

       The following introduces several important registers of the timer. We take timer 0 as an example for each one.

1. TCFG0 register

[7:0], [15:8] 8 bits are used to control prescaler 0, 1 respectively, with a value of 0 to 255. The clock frequency after the prescaler is: PCLK/(prescaler+1).

2. TCFG1 register

The clock obtained by the prescaler will enter 2-time division, and this register is used to set the 2-time division coefficient. In this way, the working frequency of the timer is: PCLK/(prescaler+1)/(divider value), where prescaler = 0~255, divider value = 2, 4, 6, 8.

3. TCON register

TCON register bits [3:0], [11:8], [15:12], [19:16], [22:20] are used for timers 0~4 respectively, bit [4] is the dead zone enable bit, and [7:5] are reserved bits. Except that timer 4 does not have an output inversion bit, the functions of other bits are similar. Here we take timer 0 as an example to illustrate. Bit [0] Enable stop bit: 0 stops the timer, 1 starts the timer. [1] Manual update bit: 0 is useless, 1 loads the value of the TCNTBn/TCMPBn register into the internal register TCNTn\TCMPn. [2] Output inversion: 0 does not invert, 1 inverts. [3] Auto-load: 0 does not auto-load, 1 auto-load.

4. TCNTBn/TCMPBn registers

5. TCNTOn register

The following is a detailed introduction on how to implement the PWM function.

1. PWM is output through pins TOUT0~TOUT3, and these four pins are multiplexed with GPB0~GPB3. Therefore, to realize the PWM function, the corresponding pins must first be configured as TOUT output.

2. Set the output clock frequency of the timer, which is based on PCLK and divided by the prescaler parameter configured by register TCFG0 and the divider parameter configured by register TCFG1.

3. Then set the specific width of the pulse. Its basic principle is to configure the count of register TCNTn (internal register) through register TCNTBn. TCNTn is decremented. If it is reduced to zero, it will reload the number in TCNTBn and start counting again. Register TCMPBn is used as a comparison register to compare with the count value. When TCNTn is equal to TCMPBn, the level of TOUTn output will flip, and when TCNTn is reduced to zero, the level will flip again, and it will be repeated. Therefore, the key to this step is to set registers TCNTBn and TCMPBn. The former can determine the length of a counting cycle, and the latter can determine the duty cycle of the square wave. Since the timer of s3c2440 has double buffering, the values ​​of these two registers can be changed while the timer is running, and it will be effective at the beginning of the next cycle.

4. The last step is to control PWM, which is realized through register TCON. When you don't want to count, you can disable the automatic reload. In this way, after TCNTn is reduced to zero, no new number will be loaded to it. Then the TOUTn output will always maintain a level (when the output inversion bit is 0, it is a high level output; when the output inversion bit is 1, it is a low level output). In this way, there is no PWM function, so this bit can be used to stop PWM.

       In general, the PWM function is actually the application of the 2440 timer.

       Next, we will analyze the Buzzer_Freq_Set function which was not analyzed in the last offline PWM test program. The function is as follows:

       void Buzzer_Freq_Set( U32 freq )

{

       rGPBCON &= ~3;                  

       rGPBCON |= 2;

       rTCFG0 &= ~0xff;

       rTCFG0 |= 15;                  

       rTCFG1 &= ~0xf;

       rTCFG1 |= 2;                    

       rTCNTB0 = (PCLK>>7)/freq;

       rTCMPB0 = rTCNTB0>>1;   

       rTCON &= ~0x1f;

       rTCON |= 0xb;                 

       rTCON &= ~2;                

}

First, rGPBCON &= ~3; the other bits remain unchanged, only the lowest 2 bits are cleared to 0.

rGPBCON |= 2; The lowest 2 bits are assigned a value of 10.

The purpose of these two sentences is to set the lowest two bits of the GPBCON register to 10, that is, to configure GPB0 to multiplex function TOUT0 as PWM output.

rTCFG0 &= ~0xff; Clear the lower 8 bits of the TCFG0 register to 0, that is, use timer 0.

rTCFG0 |= 15; assign value to the lower 8 bits of the TCFG0 register, prescaler = 15.

rTCFG1 &= ~0xf; TCFG1 only clears the lowest 4 bits to 0 and uses timer 0.

rTCFG1 |= 2; Timer 0 secondary division divider value = 8.

rTCNTB0 = (PCLK>>7)/freq; Here is to configure the count buffer register of the timer, so that PCLK/2^7/freq can get the count value required to complete a PWM cycle. Because through the previous settings, we know that the working frequency of the timer = PCLK/(15+1)/8 = PCLK/(2^7), that is, PCLK>>7, so the working frequency of the timer/PWM freq (PWM cycle/timer count cycle) = count value.

rTCMPB0 = rTCNTB0>>1; Here is to configure the comparison buffer register of the timer, so that the comparison value is half of the initial value, that is, the PWM duty cycle is set to 50%.

rTCON &= ~0x1f; and rTCON |= 0xb; are the same as above. They assign values ​​to the lowest 5 bits of TCON, turn on the timer, manually update the timer for the first time to load the values ​​of TCNTB0 and TCMP0, turn off the inverter, autoload, and disable the dead zone.

rTCON &= ~2; Clear the manual update bit.

This completes the PWM setup.

When we finish the experiment and exit, we use the Buzzer_Stop function. Let's look at this function:

void Buzzer_Stop( void )

{

       rGPBCON &= ~3;

       rGPBCON |= 1;

       rGPBDAT &= ~1;

}

The two sentences rGPBCON &= ~3; and rGPBCON |= 1; have been analyzed above. They are used to configure GPBCON. The difference is that this time the lowest two bits of GPBCON are set to 01, which means that it is used as an output function instead of TOUT of PWM.

rGPBDAT &= ~1; that is, GPB0 outputs 0 and the buzzer does not sound.

So far, the analysis of the PWM buzzer sound experiment has been completed. The principles of the subsequent experiments such as using a buzzer to sing are similar, except that the sound frequency and the delay time of the sound frequency are adjusted, which will not be analyzed later.