STM32 Beginner's Notes 1 RCC (Part 1)-EEWORLD

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I referred to the RCC routine in the standard peripheral library of STM32, and then made some modifications to it on the original basis, and added it to the two files RCC_ClkConfig.C and RCC_ClkConfig.H separately. I shared it here as a general function for future system clock configuration. The sample code is as follows:

//////////////////////////////////////////////////////////////////////////////////////////////////////

RCC_ClkConfig.C

//////////////////////////////////////////////////////////////////////////////////////////////////////

/**
** File name: RCC_ClockConfig.C
** Function description: STM32 system clock configuration header file
** Hardware platform: STM32F10X
** Compilation environment: Keil uversion4 IDE
** Library version: v3.5.0
** Version information: v0.0
** Author: ST Microcontroler
** Writing time: 2011-11-25
** Additional remarks: None
** Modification record: None
**/

/* Includes ------------------------------------------------------------------*/
#include "RCC_ClockConfig.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
RCC_ClocksTypeDef RCC_ClockFreq; //Define RCC clock frequency structure variable
ErrorStatus HSEStartUpStatus; //Enumeration status variable SUCCESS/ERROR
/* Private functions ---------------------------------------------------------*/

/**
* @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1
* prescalers.
* @param None
* @retval None
*/
//void SetSysClock(void)
//{
///* The System clock configuration functions defined below assume that:
// - For Low, Medium and High density devices an external 8MHz crystal is
// used to drive the System clock.
// - For Connectivity line devices an external 25MHz crystal is used to drive
// the System clock.
// If you are using different crystal you have to adapt those functions accordingly.
// 系统时钟配置功能定义如下：
// - For Low, Medium and High density devices an external 8MHz crystal is // used to drive the System clock.
// - For Connectivity line devices an external 25MHz crystal is used to drive // the System clock.
// If you are using different crystal you have to adapt those functions accordingly.
//*/
//
//#if defined SYSCLK_HSE
// SetSysClockToHSE();
//#elif defined SYSCLK_FREQ_24MHz
// SetSysClockTo24();
//#elif defined SYSCLK_FREQ_36MHz
// SetSysClockTo36();
//#elif defined SYSCLK_FREQ_48MHz
// SetSysClockTo48();
//#elif defined SYSCLK_FREQ _56MHz
// SetSysClockTo56();
//#elif defined SYSCLK_FREQ_72MHz
// SetSysClockTo72();
//#endif
//
// /* If none of the define above is enabled, the HSI is used as System clock
// source (default after reset) */
//}

/**
* @brief Selects HSE as System clock source and configure HCLK, PCLK2
* and PCLK1 prescalers.
* Select HSE as system clock source and configure HCLK, PCLK2 and PCLK1 prescalers .
* @param None
* @retval None
*/
void SetSysClockToHSE(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();

/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

if (HSEStartUpStatus == SUCCESS)
{
  #if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
    /* Enable Prefetch Buffer */
    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

  #ifndef STM32F10X_CL
    /* Flash 0 wait state */
    FLASH_SetLatency(FLASH_Latency_0);
  #else
    if (HSE_Value <= 24000000)
  {
        /* Flash 0 wait state */
        FLASH_SetLatency(FLASH_Latency_0);
  }
  else
  {
        /* Flash 1 wait state */
        FLASH_SetLatency(FLASH_Latency_1);
  }

  #endif /* STM32F10X_CL */
  #endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */

    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
    RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);

/* Select HSE as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);

    /* Wait till PLL is used as system clock source */
    while (RCC_GetSYSCLKSource() != 0x04)
    {}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
       User can add here some code to deal with this error
    .
    */

    /* Go to infinite loop */
    while (1)
    {}
}
}

/**
* @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo24(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();

/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

    /* Flash 0 wait state */
    FLASH_SetLatency(FLASH_Latency_0);
  #endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */

    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
    RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);

  #ifdef STM32F10X_CL
    /* Configure PLLs *********************************************************/
    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
    RCC_PREDIV2Config(RCC_PREDIV2_Div5);
    RCC_PLL2Config(RCC_PLL2Mul_8);

/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);

    /* Wait till PLL2 is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
    {}

    /* PLL configuration: PLLCLK = (PLL2 / 10) * 6 = 24 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
  #elif defined STM32F10X_LD_VL || defined STM32F10X_MD_VL || defined STM32F10X_HD_VL
    /* PLLCLK = (8MHz/2) * 6 = 24 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_HSE, RCC_PREDIV1_Div2);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
  #else
    /* PLLCLK = 8MHz * 3 = 24 MHz */
    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_3);
  #endif

/* Enable PLL */
RCC_PLLCmd(ENABLE);

    /* Wait till PLL is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {}

/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

    /* Wait till PLL is used as system clock source */
    while (RCC_GetSYSCLKSource() != 0x08)
    {}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
       User can add here some code to deal with this error */

    /* Go to infinite loop */
    while (1)
    {}
}
}
#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
/**
* @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2
*         and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo36(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();

/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

    /* Flash 1 wait state */
    FLASH_SetLatency(FLASH_Latency_1);

    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
    RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);

/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);

    /* Wait till PLL2 is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
    {}

    /* PLL configuration: PLLCLK = (PLL2 / 10) * 9 = 36 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
  #else
    /* PLLCLK = (8MHz / 2) * 9 = 36 MHz */
    RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);
  #endif

/* Enable PLL */
RCC_PLLCmd(ENABLE);

    /* Wait till PLL is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {}

/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

    /* Go to infinite loop */
    while (1)
    {}
}
}

/**
* @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo48(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();

/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

    /* Flash 1 wait state */
    FLASH_SetLatency(FLASH_Latency_1);

    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
   RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);

/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);

    /* Wait till PLL2 is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
    {}

    /* PLL configuration: PLLCLK = (PLL2 / 5) * 6 = 48 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
  #else
    /* PLLCLK = 8MHz * 6 = 48 MHz */
    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6);
  #endif

/* Enable PLL */
RCC_PLLCmd(ENABLE);

    /* Wait till PLL is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {}

/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

    /* Wait till PLL is used as system clock source */
    while (RCC_GetSYSCLKSource() != 0x08)
   {}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
       User can add here some code to deal with this error */

    /* Go to infinite loop */
    while (1)
    {}
}
}

/**
* @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo56(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();

/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

    /* Flash 2 wait state */
    FLASH_SetLatency(FLASH_Latency_2);

    /* HCLK = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
    RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);

/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);

    /* Wait till PLL2 is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
    {}

    /* PLL configuration: PLLCLK = (PLL2 / 5) * 7 = 56 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_7);
  #else
    /* PLLCLK = 8MHz * 7 = 56 MHz */
    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
  #endif

/* Enable PLL */
RCC_PLLCmd(ENABLE);

    /* Wait till PLL is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {}

/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

    /* Go to infinite loop */
    while (1)
    {}
}
}

/**
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
/*Step1: Reset all RCC peripheral registers to default values*/
RCC_DeInit();

/* Enable HSE */
/*Step2: Enable external high-speed crystal oscillator (HSE)*/
RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */
/*Step3: Wait until the external high-speed crystal oscillator is stable */
HSEStartUpStatus = RCC_WaitForHSEStartUp();

if (HSEStartUpStatus == SUCCESS)
{
    /* Enable Prefetch Buffer */
  /*Step4: Set prefetch buffer enable */
    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

    /* Flash 2 wait state */
  /*Step5: Set code delay value, FLASH_Latency_2, 2 delay cycles */
    FLASH_SetLatency(FLASH_Latency_2);

    /* HCLK = SYSCLK */
  /*Step6: Set AHB clock (HCLK) equal to system clock */
  //RCC_SYSCLK_Div1: AHB clock = system clock
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    /* PCLK2 = HCLK */
  /*Step7: Set high-speed APB2 clock (PCLK2) to system clock */
  //RCC_HCLK_Div1: APB2 clock = HCLK
    RCC_PCLK2Config(RCC_HCLK_Div1);

    /* PCLK1 = HCLK/2 */
  /*Step8: Set the low-speed APB1 clock (PCLK1) to 1/2 of the system clock. The maximum APB1 clock is 36MHz*/
  //RCC_HCLK_Div2: APB1 clock = HCLK/2
    RCC_PCLK1Config(RCC_HCLK_Div2);

  /*Step9: Set the PLL clock source and multiplication factor. The maximum clock after PLL multiplication is 72MHz*/
  #ifdef STM32F10X_CL//If it is an interconnected device
    /* Configure PLLs *********************************************************/
    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
    RCC_PREDIV2Config(RCC_PREDIV2_Div5);
    RCC_PLL2Config(RCC_PLL2Mul_8);

/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);

    /* Wait till PLL2 is ready */
    while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
    {}

    /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */
    RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
    RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
  #else//If it is another type of device
    /* PLLCLK = 8MHz * 9 = 72 MHz */
    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
  #endif

    /* Enable PLL */
  /*Step10:使能PLL*/
    RCC_PLLCmd(ENABLE);

    /* Wait till PLL is ready */
  /*Step11: Wait for PLL initialization to succeed */
    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {}

    /* Select PLL as system clock source */
  /*Step12: Set PLL as system clock source (SYSCLK) */
    RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

    /* Wait till PLL is used as system clock source */
  /*Step13: Wait for PLL to be successfully used as the clock source of the system clock */
  //0x00: HSI as the system clock
  //0x04: HSE as the system clock
  //0x08: PLL as the system clock
    while(RCC_GetSYSCLKSource() != 0x08)
    {}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
       User can add here some code to deal with this error
  If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error.
  */

    /* Go to infinite loop */
    while (1)
    {}
}
}

#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */

//////////////////////////////////////////////////////////////////////////////////////////////////////

RCC_ClkConfig.H

//////////////////////////////////////////////////////////////////////////////////////////////////////

/**
** File name: RCC_ClockConfig.H
** Function description: STM32 system clock configuration header file declaration
** Hardware platform: STM32F10X
** Compilation environment: Keil uversion4 IDE
** Library version: v3.5.0
** Version information: v0.0
** Author: ST Microcontroler
** Writing time: 2011-11-25
** Additional remarks: None
** Modification record: None
**/

/* Define to prevent recursive inclusion (Define to prevent recursive inclusion)-----------------*/
#ifndef __RCC_CLOCKCONFIG_H
#define __RCC_CLOCKCONFIG_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line corresponding to the desired System clock (SYSCLK)
   frequency (after reset the HSI is used as SYSCLK source)
   Remove the comments of the line corresponding to the desired system clock frequency. Do not use the macro definition to declare
   the system clock frequency. Instead, directly call the corresponding function to implement it (2011-11-25) */
//#define SYSCLK_HSE
//#define SYSCLK_FREQ_24MHz
//#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
// //#define SYSCLK_FREQ_36MHz
// //#define SYSCLK_FREQ_48MHz
// //#define SYSCLK_FREQ_56MHz
// #define SYSCLK_FREQ_72MHz
//#endif
/* Exported macro ------------------------------------------------------------------*/
/* Exported functions ---------------------------------------------------------- *
//void SetSysClock(void);
void SetSysClockToHSE(void);
void SetSysClockTo24(void);
void SetSysClockTo36(void);
void SetSysClockTo48(void);
void SetSysClockTo56(void);
void SetSysClockTo72(void);

#endif /* __RCC_CLOCKCONFIG_H */

Keywords：STM32 Reference address：STM32 Beginner's Notes 1 RCC (Part 1)

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