STM32 clock frequency and timer clock explanation-EEWORLD

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This study note is based on the STM32 firmware library V3.0.
Chip model used: STM32F103
Development environment: MDK
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Lesson 1 Clock Frequency

The internal 8M oscillator of STM32F103 can reach a maximum of 72M after frequency multiplication. Currently, the maximum frequency of TI's M3 series chips can reach 80M.

In the stm32 firmware library 3.0, the selection of clock frequency has been greatly simplified. A lot of operations are done in the background. The function given by the system is SystemInit(). However, some macro definition settings need to be made before calling it. The specific settings are in the system_stm32f10x.c file.

There is a definition like this at the beginning of the file:
//#define SYSCLK_FREQ_HSE HSE_Value
//#define SYSCLK_FREQ_20MHz 20000000
//#define SYSCLK_FREQ_36MHz 36000000
//#define SYSCLK_FREQ_48MHz 48000000
//#define SYSCLK_FREQ_56MHz 56000000
#define SYSCLK_FREQ_72MHz 72000000

The external crystal oscillator recommended by ST is 8M, so the settings of the library functions are all based on the assumption that your hardware has been connected to an 8M crystal oscillator for operation. The above is the recommended CPU frequency selection when the default crystal oscillator is 8M. Here, we choose:
#define SYSCLK_FREQ_72MHz 72000000
, which is the maximum value of 72M that the 103 series can run.

然后这个 C文件继续往下看
#elif defined SYSCLK_FREQ_72MHz
const uint32_t SystemFrequency         = SYSCLK_FREQ_72MHz;
const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_72MHz;
const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_72MHz;
const uint32_t SystemFrequency_APB1Clk = (SYSCLK_FREQ_72MHz/2);
const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_72MHz;

These are the speeds of each system when the CPU is defined to run at 72M. They are: hardware frequency, system clock, AHB bus frequency, APB1 bus frequency, APB2 bus frequency. Looking down, we see this:
#elif defined SYSCLK_FREQ_72MHz
static void SetSysClockTo72(void);

This is the function that sets the clock when defining 72M. This function is called by the SetSysClock() function, and
the SetSysClock() function is called by the SystemInit() function. Finally, the SystemInit() function is called by you.

So the process of setting the system clock is:
first, the user program calls the SystemInit() function, which is a library function. Then, in the SystemInit() function, after some necessary register initialization, the SetSysClock() function is called. According to the macro definition of #define SYSCLK_FREQ_72MHz 72000000, the SetSysClock() function knows to call the SetSysClockTo72() function, so there are a lot of troublesome and complicated settings ~!@#$% ^Then, the CPU runs at a speed of 72M. Although it is a bit cumbersome, you only need to know that if the user wants to set the frequency, there are only two things to do in the program:
First: #define SYSCLK_FREQ_72MHz 72000000 in system_stm32f10x.c
Second: call SystemInit()

Clock source of timer in STM32

There are up to 8 timers in STM32, of which TIM1 and TIM8 are advanced timers that can generate three pairs of PWM complementary outputs, commonly used to drive three-phase motors, and their clocks are generated by the output of APB2. The other 6 are ordinary timers, and their clocks are generated by the output of APB1.

The following figure is a screenshot of the timer clock section in the clock distribution diagram in the STM32 reference manual:

STM32 clock frequency and timer clock explanation - hardy - Footprints of growth

As can be seen from the figure, the timer clock does not come directly from APB1 or APB2, but from a frequency multiplier whose input is APB1 or APB2, which is the blue part in the figure.
The following uses the clocks of timers 2 to 7 to illustrate the role of this frequency multiplier: when the pre-scaling factor of APB1 is 1, this frequency multiplier does not work, and the clock frequency of the timer is equal to the frequency of APB1; when the pre-scaling factor of APB1 is other values (that is, the pre-scaling factor is 2, 4, 8 or 16), this frequency multiplier works, and the clock frequency of the timer is equal to twice the frequency of APB1.

Assume AHB=36MHz, because the maximum frequency allowed by APB1 is 36MHz, the pre-division coefficient of APB1 can take any value; when the pre-division coefficient = 1, APB1 = 36MHz, the clock frequency of TIM2~7 = 36MHz (the multiplier does not work); when the pre-division coefficient = 2, APB1 = 18MHz, under the action of the multiplier, the clock frequency of TIM2~7 = 36MHz.

Some people may ask, since the clock frequency of TIM2~7 is required to be 36MHz, why not directly use the pre-scaling coefficient of APB1 = 1? The answer is: APB1 not only provides clocks for TIM2~7, but also provides clocks for other peripherals; setting this multiplier can ensure that TIM2~7 can still get a higher clock frequency when other peripherals use a lower clock frequency.

Another example: when AHB=72MHz, the pre-scaling factor of APB1 must be greater than 2, because the maximum frequency of APB1 can only be 36MHz. If the pre-scaling factor of APB1 = 2, then because of this multiplier, TIM2~7 can still get a clock frequency of 72MHz. Being able to use a higher clock frequency undoubtedly improves the resolution of the timer, which is also the original intention of designing this multiplier.

Keywords：STM32 Reference address：STM32 clock frequency and timer clock explanation

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