Comparison between ARM instruction set and X86 instruction set

The strength of instructions is an important indicator of the CPU, and the instruction set is one of the most effective tools to improve the efficiency of the microprocessor. From the current mainstream architecture, the instruction set can be divided into two parts: complex instruction set (CISC) and reduced instruction set (RISC).

Correspondingly, microprocessors can be divided into two categories: CISC and RISC according to the complexity of microinstructions.

CISC

It is a chip design system for easy programming and improved memory access efficiency. Before the mid-1990s, most microprocessors used the CISC system, including Intel's 80x86 and Motorola's 68K series. That is, the so-called X86 architecture belongs to the CISC system.

RISC

It is a chip system designed to increase the speed of processor operation. Its key technology is pipeline operation (Pipelining): completing multiple instructions in one clock cycle. Superpipeline and superscalar technology have been widely used in chip design. RISC system is mostly used in non-x86 camp high-performance microprocessor CPUs. Such as HOLTEK MCU series.

ARM (Advanced RISC Machines) can be considered as the name of a company, a general term for a type of microprocessor, or the name of a technology. The ARM architecture is currently recognized as the industry's leading 32-bit embedded RISC microprocessor structure. All ARM processors share this architecture.

Therefore, we can start with the comparison of the systems they belong to and compare the X86 instruction set with the ARM instruction set.

2. Comparison between CISC and RISC

(one)

CISC

1

．Instruction characteristics of CISC system

Use microcode.

The instruction set can be executed directly in the microcode memory (which is much faster than the main memory). Newly designed processors only need to add fewer transistors to execute the same instruction set, and new instruction set programs can also be written quickly.

Huge instruction set.

It can reduce the number of lines of code required for programming and reduce the burden on programmers. The instruction set corresponding to the high-level language: including dual operand format, register to register, register to memory, and memory to register instructions.

2

． Advantages and disadvantages of CISC system

advantage:

It can effectively shorten the microcode design time for new instructions, allowing designers to achieve upward compatibility with CISC system machines. New systems can use a superset of instructions that includes earlier systems, so they can use the same software used on earlier computers. In addition, the format of microprogram instructions matches high-level languages, so compilers do not have to be rewritten.

shortcoming:

The instruction set and chip design are more complex than the previous generation of products. Different instructions require different clock cycles to complete. Slower execution of instructions will affect the execution efficiency of the entire machine.

RISC

1

．Instruction characteristics of RISC system

Reduced instruction set:

It contains simple and basic instructions, through which complex instructions can be combined.

Commands of the same length:

Each instruction is the same length and can be completed in a single operation.

Single machine cycle instructions:

Most instructions can be completed in a single machine cycle, allowing the processor to execute a series of instructions at the same time.

2

． Advantages and disadvantages of RISC system

advantage:

Using the same chip technology and the same operating clock, the RISC system will run 2 to 4 times faster than the CISC system. Since the instruction set of the RISC processor is streamlined, its memory management unit, floating point unit, etc. can be designed on the same chip. The RISC processor is simpler to design than the corresponding CISC processor, and the time required will become shorter. It can also apply more advanced technologies than CISC processors to develop faster next-generation processors.

shortcoming:

The operation of multiple instructions requires programmers to carefully select the appropriate compiler, and the amount of code written will become very large. In addition, RISC system processors require faster memory, which is usually integrated into the processor, that is, L1 Cache (first level cache).

To sum up the above, if we want to further compare the differences between CISC and RISC, we can analyze them from the following points:

1. Formation of instructions

CISC

Due to the complexity of the instructions, a microinstruction code control unit is designed. 90% of RISC instructions are completed directly by hardware, and only 10% of instructions are completed by software in a combined manner. Therefore, the instruction execution time of RISC is shorter, but the ROM space required by RISC is relatively larger. As for the RAM usage size, it should be more related to the application of the program.

2. Addressing mode

CISC

CISC requires more addressing modes, while RISC has only a few addressing modes. Therefore, when the CPU calculates the effective memory address, CISC occupies more bus cycles.

3. Execution of instructions

CISC

The format of instructions varies in length, and the number of cycles during execution is not uniform, while the RISC structure is just the opposite, so it is suitable for the design of pipeline processing architecture, which can achieve the goal of completing one instruction in one cycle on average. Obviously, RISC is simpler than CISC in design. At the same time, because CISC has too many execution steps, the waiting time of idle unit circuits increases, which is not conducive to parallel processing design. Therefore, in terms of performance, RISC still has the upper hand over CISC. However, RISC has the disadvantage of increasing the size of application code after the instruction simplification, requiring a larger program memory space, and having more instruction types.

(III) X86 instruction set and ARM instruction set:

(1) X86 instruction set:

X86

The instruction set was developed by Intel for its first 16-bit CPU (i8086). The X87 chip series math coprocessor added to computers to improve floating-point data processing capabilities also uses X87 instructions. From now on, the X86 instruction set and the X87 instruction set are collectively referred to as the X86 instruction set. Although with the continuous development of CPU technology, Intel has successively developed newer i80386 and i80486, in order to ensure that computers can continue to run various previously developed applications to protect and inherit rich software resources, all CPUs produced by Intel continue to use the X86 instruction set, so its CPUs still belong to the X86 series. Since the Intel X86 series and its compatible CPUs all use the X86 instruction set, today's huge X86 series and compatible CPU lineup has been formed.

In addition to the many features of CISC mentioned above, the X86 instruction set has the following prominent disadvantages:

l General register group————Influence on CPU core structure

The X86 instruction set has only 8 general registers. Therefore, CISC CPU execution spends most of its time accessing data in memory rather than in registers, which slows down the entire system.

RISC systems often have a large number of general-purpose registers and use technologies such as overlapping register windows and register stacks to make full use of register resources.

l Decoding————Impact on the CPU's outer core

Decoder (Decode Unit), this is something that only x86 CPU has. Its function is to convert x86 instructions of variable length into fixed-length RISC-like instructions and pass them to the RISC core. Decoding is divided into hardware decoding and micro decoding. For simple x86 instructions, hardware decoding is sufficient, which is fast. However, for complex x86 instructions, micro decoding is required and it is divided into several simple instructions, which is slow and complicated. Whether it is Athlon or PIII, the old CISC X86 instruction set seriously restricts their performance.

l Small addressing range - restricts user needs

Even though AMD

When the X86-64 architecture was developed, although some inherent shortcomings of the traditional X86 were solved, such as the expansion of the addressing range, this improvement did not directly lead to performance improvements.

(2) ARM instruction set:

In comparison, the ARM instruction set based on RISC has a unified instruction format, fewer types, and fewer addressing methods than complex instruction sets. Of course, the processing speed is much higher. ARM processors are all so-called reduced instruction set processors (RISC).

All of its instructions are composed of some simple instructions. Simple instructions mean that the corresponding hardware circuits can be optimized as much as possible to improve the execution rate, which in turn reduces the time required for an instruction to a minimum.

Because the instruction set is streamlined, many tasks must be combined with simple instructions, and more complex combinations need to be performed by a "compiler". The X86 instruction set of the CISC system provides more instruction sets, so many tasks can be replaced by one or several instructions, and the compiler's work is therefore greatly reduced.

In addition to the many features of RISC mentioned above, some other features of the ARM instruction set architecture can be summarized as follows:

ARM

specialty

1. Small size, low power consumption, low cost, high performance

2. Supports Thumb (16-bit)/ARM (32-bit) dual instruction sets and is well compatible with 8-bit/16-bit devices;

3. Extensive use of registers, faster instruction execution speed;

4. Most data operations are completed in registers;

5. The addressing method is flexible and simple, and the execution efficiency is high;

6. The instruction length is fixed;

7. Pipeline processing method

8. Load_store structure

Some non-RISC of ARM

The instruction framework of thought:

1. Allow some specific instructions to have variable execution cycle numbers to reduce power consumption, area and code size.

2. Added a barrel shifter to extend the functionality of some instructions.

3. The 16-bit Thumb instruction set is used to improve code density.

4. Use conditional execution instructions to improve code density and performance.

5. Use enhanced instructions to implement data signal processing functions.

(IV) Summary:

Therefore, the characteristics of CISC, such as a large number of complex instructions, variable instruction length, and multiple addressing modes, are also the disadvantages of CISC, because these greatly increase the difficulty of decoding. With the current high-speed hardware development, the speed improvement brought by complex instructions is no longer as good as the time wasted on decoding. Except for the personal PC market that still uses the X86 instruction set, servers and larger systems have long stopped using CISC. The reason why x86 still exists is to be compatible with a large number of software on the x86 platform. At the same time, its architecture is not difficult to implement.

The biggest feature of RISC system's ARM instructions is that the instruction length is fixed, there are few types of instruction formats, there are few types of addressing modes, most of them are simple instructions and can be completed within one clock cycle, it is easy to design superscalar and pipeline, there are many registers, and a large number of operations are performed between registers. The advantages are self-evident, so ARM processors have become the most popular processor series and one of the mainstream embedded processing architectures.

RISC

Intel is currently at its peak and it seems that it will eventually abandon x86 and turn to RISC architecture.

In fact, as RISC processors shine in the embedded field, the traditional X86 series CISC processors have also overcome the problem of high power consumption under the active improvement of Intel, becoming the best choice for some high-performance embedded devices. Today, the boundary between CISC and RISC is no longer so clear-cut, and the design of RISC itself is becoming more and more complex (of course, it is not completely complex according to the idea of ​​CISC), because all CPUs actually used need to continuously improve performance, so it is inevitable to add new features to the architecture. On the other hand, processors that were originally considered to be CISC architectures have also absorbed many advantages of RISC. For example, the Pentium processor also uses the RISC architecture in its internal implementation. Complex instructions are decomposed into multiple streamlined instructions by microcode internally to run, but for the outside of the processor, in order to maintain compatibility, it is still displayed in a CISC-style instruction set.