Hardware:
The S3c2440A serial port provides three independent asynchronous serial communication I/O ports. Each serial port can send and receive data in normal interrupt mode or DMA mode. When the system clock is used, the maximum rate is 115.2kbps. If an external clock (UEXTCLK) is used, the UART speed can be faster. Each serial port contains two 64-byte FIFO buffers for sending or transmitting data.
The S3c2440A serial port has programmable baud rate, infrared (IR) data transmission and reception, 1 or 2 stop bits, 5/6/7/8 bit data width and parity checking.
Each serial port consists of a baud rate generating unit, a transmitting unit, a receiving unit, and a control unit. As shown in the figure below, the clock of the baud generating unit can be PCLK, FCLK/n, or UEXTCLK (external input clock). The transmitting and receiving units contain a 64-byte FIFOs (first-in first-out queue) and a data shifter. When sending data, the data is written into the FIFO and then copied to the data shifter before sending the data. Finally, the data is sent out bit by bit by the data transmitting pin (TxDn). Similarly, when receiving data, the data is received bit by bit by the data receiving pin (RxDn) and then copied to the FIFO buffer.
register:
There are three serial port control registers: UCON0 ~ UCON1 correspond to each serial port respectively, which are used to set the UART working mode, baud rate, interrupt type, etc.
Status register: UTRSTAT0 ~UTRSTAT2, used for receiving/sending status indication when the serial port is working
FIFO control register: UFCON0 ~ UFCON2, used to set FIFO.
FIFO status register: UFSTAT0 ~ UFSTAT2, used to indicate the status of the FIFO buffer
The use of Arm-linux s3c2440 serial port mainly involves the operation of the above registers.
The next article will analyze the implementation of arm-linux s3c2440 serial port driver in combination with source code (software article)
Previous article:S3C2440 UART Operation (FIFO Mode)
Next article:ARMLinux s3c2440 UART Analysis 2
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