Detailed explanation of PIC mid-range microcontroller assembly instructions (6)

SLEEP The microcontroller enters low power sleep mode

Grammatical form: SLEEP

Operands: None

Execution time: one instruction cycle

Implementation process:

Watchdog counter cleared

The prescaler of the watchdog counter is cleared to 0.

The "TO" flag in the STATUS register is set to 1

The "PD" flag bit in the STATUS register is cleared to 0

Status flags affect: TO PD

Description: The SLEEP instruction can make the microcontroller stop all operations and enter low-power sleep mode. In sleep mode, the power consumption of the chip is reduced to the minimum. In sleep mode, the main clock oscillator of the microcontroller will stop, and the contents of all internal registers will remain unchanged until a certain condition occurs to wake up the microcontroller from sleep mode.

Command example:

CALL PrepSleep ; Turn off all unnecessary loads and prepare to enter sleep mode

SLEEP ; Now enter sleep mode

NOP; Start executing instructions after waking up

CLRWDT Clear watchdog counter

Syntax: CLRWDT

Operands: None

Execution time: one instruction cycle

Implementation process:

Watchdog counter cleared

The prescaler of the watchdog counter is cleared to 0.

The "TO" flag in the STATUS register is set to 1

The "PD" flag in the STATUS register is set to 1

Status flags affect: TO PD

Note: If the chip is programmed with an independent on-chip watchdog circuit enabled, the clear watchdog command must be executed at intervals during program execution. If this instruction is not executed for a long enough time, the watchdog counter will overflow and the microcontroller will be reset, and the program will be restarted from the reset address. Once the watchdog of the PIC microcontroller is turned on, it cannot be turned off by software. It still works when the chip is dormant, so it can be used as a condition for the microcontroller to exit dormancy. By enabling the watchdog, software dead loop failures can be avoided. It should be emphasized that in a good program design, the CLRWDT instruction only appears once in the main loop of the program. Try to avoid placing clear watchdog instructions everywhere, and never put this instruction in the interrupt service program.

Command example:

MainLoop:~~~; Main loop of the program

CLRWDT; Clear watchdog

CALL KeyCheck ；Check key

CALL Display ; Display refresh

GOTO MainLoop ; repeat the main loop body

RETLW The subroutine ends and returns, and an 8-bit immediate value is assigned to the W register.

Syntax: RETLW k

Operand: k is an 8-bit immediate value

Execution time: 2 instruction cycles

Execution process: Pop the top content of the stack to PC

k→W

Status flags affected: None

Note: Except for taking an 8-bit immediate value from the W register when returning from the subroutine, the other execution conditions are exactly the same as the instruction "RETURN". This instruction is often used in table lookup functions.

Command example:

MOVF Index, W; W sets the table index value (0~3)

CALL Lookup ; Call the table lookup subroutine

... ; Other instructions

Lookup: ADDWF PCL, f; modify the PC value

RETLW '0'; Return the ASCII code corresponding to 0

RETLW '1'; Return the ASCII code corresponding to 1

RETLW '2'; Returns the ASCII code corresponding to 2

RETLW '3'; Return the ASCII code corresponding to 3

RETFIE interrupt service routine ends and returns

Syntax: RETFIE

Operands: None

Execution time: 2 instruction cycles

Execution process: Pop the top content of the stack to PC

Bit 7 GIE of the INTCON register is automatically set to 1

Status flags affected: None

Description: This instruction pops the contents of the top of the hardware stack (the return address when an interrupt occurs) into the program counter PC. The effect on the stack is shown in the following figure.

It is basically the same as the instruction "RETURN", the key difference is that this instruction will set the 7th bit of the global interrupt enable bit (GIE) of the INTCON register to 1 (this bit is automatically cleared to 0 when responding to an interrupt), and then return to the next instruction when the interrupt occurs to continue running.

Command example:

MOVF status_temp, w ; prepare to restore the contents of the STATUS register

MOVWF STATUS ; STATUS register is restored

SWAPF w_temp, f ; prepare to restore the contents of the W register

SWAPF w_temp, w ; W register is restored

RETFIE; interrupt return and allow new interrupt response

RETURN Subroutine ends and returns

Syntax: RETURN

Operands: None

Execution time: 2 instruction cycles

Execution process: Pop the top content of the stack to PC

Status flags affected: None

Description: This instruction pops the contents of the top of the stack (the return address when a subroutine is called) into the program counter PC. Note that the contents of the special register PCLATH will not be changed. The program will return to the next instruction when the subroutine is called and start execution.

The impact is shown in the figure

Command example:

CALL Dly4Tcy; Delay 4 instruction cycles

... ; Other instructions

Dly4Tcy: RETURN; CALL and RETURN consume a total of 4 instruction cycles