My own hardware platform uses the 6410 DMC1, which is a 32-bit DRAM controller. The address lines of two 16-bit 128M DDRs are connected together to the 16 address lines of the 6410. The data lines are connected together to form 32 bits on the 6410, and the other control pins are connected accordingly. The software was previously written to 128M and ran OK. When it was changed to 256M, a page allocation error occurred, resulting in a fatal error and crash. Finally, I found that I had missed a change.
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In summary, there are three places to confirm:
1. smdk6410.h in UBOOT
#define MEMORY_BASE_ADDRESS
....
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1
#define PHYS_SDRAM_1_SIZE 0x10000000 //rico
First, only one BANK, DMC1, is used. Secondly, the size of SDRAM should be changed to 256M.
2. smdk6410.h in UBOOT
#define DMC1_MEM_CFG
#define DMC1_MEM_CFG2
#define DMC1_CHIP0_CFG
0x50<<8)+(0xF0<<0))
#define DMC_DDR_32_CFG
The timing parameters of DDR can be confirmed according to the specification. Here are several register parameters that need to be written into the DDR controller during DDR initialization, including bit width, chip select requirements, etc. The error that caused my computer to crash before was that the chip select was wrong, so changing it to 256M caused page address addressing errors.
3. .config in Kernel
You can use vi .config to enter. Make sure CONFIG_SMDK6410_RAMSIZE_256M is turned on and replace CONFIG_SMDK6410_RAMSIZE_128M. It is reflected in arch\arm\mach-s3c6400\include\mach\Memory.h:
#ifdef CONFIG_SMDK6410_RAMSIZE_256M
#define PHYS_SIZE
#else
#define PHYS_SIZE
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