Conversion between PCF8591A/DD/A-EEWORLD

Collect

/********************

A/DD/A conversion

********************/

#include

#define uint unsigned int

#define uchar unsigned char

#define PCF8591 0x90 // PCF8591 address

sbit sda=P2^0;

sbit scl=P2^1;

sbit LS138A=P2^2; //138 decoder 3-bit control digital tube

sbit LS138B=P2^3;

sbit LS138C=P2^4;

uint Ledout[8]; //8-bit digital tube

uchar AD_change;

uint num0,num1,num2,num3;

uint count;

uchar code table[]={

0x3f,0x06,0x5b,0x4f,

0x66,0x6d,0x7d,0x07,

0x7f,0x6f}; //Segment selection

void delay()//Execute empty statement, microsecond delay function

{;;}

void delay1ms(uint z) //delay 1ms

{

uint x,y;

for(x=z;x>0;x--)

{

for(y=0;y<=110;y++)

{

}

void init()//In the initialization state, both SCL and SDA are high

{

scl=1;

delay();

sda=1;

delay();

}

void start() //When SCL is high, SDA changes from high to low

{

sda=1;

delay();

scl=1;

delay();

sda=0;

}

void respons()

Acknowledge signal: When SCL is at a high level, SDA is pulled low by the slave device to indicate an acknowledgement.

(sda==1) and i<255, indicating that if there is no response from the slave device within a period of time, the master device

By default, the slave device has received the data and is no longer waiting for the response signal.

{

flying i;

scl=1;

delay();

while((sda==1)&&(i<250))

{

i++;

}

scl=0;

delay();

}

void stop() //SCL is at high level, SDA stops the signal with a rising edge

{

sda=0;

delay();

scl=1;

delay();

sda=1;

}

void write_byte(uchar date) //write a byte

{

flying i,temp;

temp=date;

for(i=0;i<8;i++)

{

temp=temp<<1;

scl=0; //The state of the SDA data line is allowed to change only when SCL is 0

delay();

sda=CY; //CY carry flag of PSW register

delay();

scl=1; //The data on the data line must remain stable while the SCL clock signal is at a high level delay();

delay();

}

scl=0;

delay();

sda=1; //Release the bus

delay();

}

fly read_byte()

{

flying i,k;

scl=0;

delay();

sda=1; //Release the bus

delay();

for(i=0;i<8;i++)

{

scl=1;

delay();

k=(k<<1)|sda;

scl=0;

delay();

}

//delay();here is a bug

return k;

}

[page]

void write_address(uchar address,uchar date)

{

start();

write_byte(0x90);

response();

write_byte(address);

response();

write_byte(date);

response();

stop();

}

uchar read_address(uchar address)

{

flying date;

start();

write_byte(0x90); //10010000 The first four bits are fixed, the next three bits are all grounded, so they are all 0, and the last bit is written, so it is low level

response();

write_byte(address);

response();

start();

write_byte(0x91);

response();

date=read_byte();

stop();

return date;

}

void display()

{

flying i;

Ledout[0]=table[num0%10000/1000];

Ledout[1]=table[num0%1000/100];

Ledout[2]=table[num0%100/10];

Ledout[3]=table[num0%10];

Ledout[4]=table[num1%10000/1000];

Ledout[5]=table[num1%1000/100];

Ledout[6]=table[num1%100/10];

Ledout[7]=table[num1%10];

for(i=0;i<8;i++)

{

P0=Ledout[i];

switch(i)

{

case 0:LS138A=0; LS138B=0; LS138C=0; break;

case 1:LS138A=1; LS138B=0; LS138C=0; break;

case 2:LS138A=0; LS138B=1; LS138C=0; break;

case 3:LS138A=1; LS138B=1; LS138C=0; break;

case 4:LS138A=0; LS138B=0; LS138C=1; break;

case 5:LS138A=1; LS138B=0; LS138C=1; break;

case 6:LS138A=0; LS138B=1; LS138C=1; break;

case 7:LS138A=1; LS138B=1; LS138C=1; break;

}

delay1ms(2);

}

P0=0x00;

}

void main()

{

heat();

AD_change=0;

while(1)

{

switch(AD_change)

{

case 0:num0=read_address(0x41);

break;

case 1:num1=read_address(0x42);

break;

case 2:num2=read_address(0x43);

break;

case 3:num3=read_address(0x40);

break;

case 4:write_address(0x40,num1);

break;

}

if(++AD_change>4)

{

AD_change=0;

}

display();

}

Keywords：PCF8591 Reference address：Conversion between PCF8591A/DD/A

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