Serial port DMA control experiment
I. Background
DMA is the abbreviation of Direct Memory Access, which means "direct memory access". It refers to a high-speed data transmission operation that allows data to be read and written directly between external devices and memory, that is, without going through the CPU and without CPU intervention. The entire data transmission operation is carried out under the control of a "DMA controller". In addition to a little processing at the beginning and end of the data transmission, the CPU can perform other work during the transmission process. In this way, most of the time, the CPU and input and output are in parallel operation. Therefore, the efficiency of the entire computer system is greatly improved.
The working process of the AT91SAM7S64 serial port peripheral DMA controller is as follows: the starting address of the data buffer to be sent is assigned to the send pointer register of the serial port DMA controller, and then the number of bytes to be sent is assigned to the send count register of the PDC. Then, without the intervention of the CPU, the DMA automatically starts the serial port sending operation, and automatically stops after sending these data; similarly, as long as the starting address of the receive data buffer is assigned to the receive pointer register of the serial port DMA controller, and then the number of bytes to be received is assigned to the receive count value of the PCD, the DMA will automatically start the serial port receiving data, and after receiving these data, notify the CPU.
II. Experimental purpose
Verify the working process of the serial port DMA controller described above, which can be verified by serial port debugging software.
III. Experimental procedure and parameter settings
1> The connector option settings and startup code are the same as the previous experiment
2> C language code
#i nclude "AT91SAM7S64.h"
#i nclude "Board.h"
unsigned char RxBuff[256],TxBuff[256];
int main(void)
{
unsigned int i;
*AT91C_CKGR_MOR = 0x701; //Enable main oscillator and set start-up time
*AT91C_PMC_MCKR = 0x01; //Select Master Clock is main clock, divided by 0
*AT91C_PMC_SCER = AT91C_CKGR_MOSCEN; //Enable processor clock of system clock register
*AT91C_PMC_PCER = AT91C_ID_US0; //Enable USART0 clock
*AT91C_PIOA_PDR = US_RXD_PIN | US_TXD_PIN; //Disable the I/O port function of these two pins
*AT91C_PIOA_ASR= US_RXD_PIN | US_TXD_PIN; //Assign these two I/O ports to peripheral A
*AT91C_US0_CR = 0x1ac; //Reset the receiver and transmitter, enable receiving and sending, reset the status bit
*AT91C_US1_MR = 0x8c0; //Normal mode, clock is MCK, 8-bit length, no parity, 1 stop bit,
*AT91C_US0_IDR = 0xf3fff; //Disable all UART related interrupts
*AT91C_US0_BRGR = 30; //Set the baud rate to 38400Hz, AT91C_US0_BRGR is the CD value
*AT91C_US0_CR = 0x50; //Enable sending and receiving
*AT91C_US0_ PTC R = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; //Enable PDC sending and receiving of US0
for (i = 0; i //Overwrite the send buffer
TxBuff = i;
} //The following can be executed in single step to observe the phenomenon
*AT91C_US0_TPR = (unsigned int)TxBuff; //Overwrite the start address of the send buffer
*AT91C_US0_TCR = 256; //Start PDC to send 256 bytes
*AT91C_US0_RPR = (unsigned int)RxBuff; //Overwrite the start address of the receive buffer
*AT91C_US0_RCR = 256; //Start PDC receiving
while (1);
}
Four. Summary When
we use the serial port of 51 and other single-chip microcomputers to send and receive data, because sending and receiving share a buffer, we usually need to add a "while(! TI );" statement after sending a byte of data to wait for the data to be sent; when receiving data, we need to use interrupts to process, and the CPU must be interrupted once every time a byte of data is received. With the DMA function, there is no need to waste CPU time in this way, which can greatly improve the real-time performance of the CPU.
Keywords:ARM
Reference address:ARM Getting Started Notes (7)
I. Background
DMA is the abbreviation of Direct Memory Access, which means "direct memory access". It refers to a high-speed data transmission operation that allows data to be read and written directly between external devices and memory, that is, without going through the CPU and without CPU intervention. The entire data transmission operation is carried out under the control of a "DMA controller". In addition to a little processing at the beginning and end of the data transmission, the CPU can perform other work during the transmission process. In this way, most of the time, the CPU and input and output are in parallel operation. Therefore, the efficiency of the entire computer system is greatly improved.
The working process of the AT91SAM7S64 serial port peripheral DMA controller is as follows: the starting address of the data buffer to be sent is assigned to the send pointer register of the serial port DMA controller, and then the number of bytes to be sent is assigned to the send count register of the PDC. Then, without the intervention of the CPU, the DMA automatically starts the serial port sending operation, and automatically stops after sending these data; similarly, as long as the starting address of the receive data buffer is assigned to the receive pointer register of the serial port DMA controller, and then the number of bytes to be received is assigned to the receive count value of the PCD, the DMA will automatically start the serial port receiving data, and after receiving these data, notify the CPU.
II. Experimental purpose
Verify the working process of the serial port DMA controller described above, which can be verified by serial port debugging software.
III. Experimental procedure and parameter settings
1> The connector option settings and startup code are the same as the previous experiment
2> C language code
#i nclude "AT91SAM7S64.h"
#i nclude "Board.h"
unsigned char RxBuff[256],TxBuff[256];
int main(void)
{
unsigned int i;
*AT91C_CKGR_MOR = 0x701; //Enable main oscillator and set start-up time
*AT91C_PMC_MCKR = 0x01; //Select Master Clock is main clock, divided by 0
*AT91C_PMC_SCER = AT91C_CKGR_MOSCEN; //Enable processor clock of system clock register
*AT91C_PMC_PCER = AT91C_ID_US0; //Enable USART0 clock
*AT91C_PIOA_PDR = US_RXD_PIN | US_TXD_PIN; //Disable the I/O port function of these two pins
*AT91C_PIOA_ASR= US_RXD_PIN | US_TXD_PIN; //Assign these two I/O ports to peripheral A
*AT91C_US0_CR = 0x1ac; //Reset the receiver and transmitter, enable receiving and sending, reset the status bit
*AT91C_US1_MR = 0x8c0; //Normal mode, clock is MCK, 8-bit length, no parity, 1 stop bit,
*AT91C_US0_IDR = 0xf3fff; //Disable all UART related interrupts
*AT91C_US0_BRGR = 30; //Set the baud rate to 38400Hz, AT91C_US0_BRGR is the CD value
*AT91C_US0_CR = 0x50; //Enable sending and receiving
*AT91C_US0_ PTC R = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; //Enable PDC sending and receiving of US0
for (i = 0; i //Overwrite the send buffer
TxBuff = i;
} //The following can be executed in single step to observe the phenomenon
*AT91C_US0_TPR = (unsigned int)TxBuff; //Overwrite the start address of the send buffer
*AT91C_US0_TCR = 256; //Start PDC to send 256 bytes
*AT91C_US0_RPR = (unsigned int)RxBuff; //Overwrite the start address of the receive buffer
*AT91C_US0_RCR = 256; //Start PDC receiving
while (1);
}
Four. Summary When
we use the serial port of 51 and other single-chip microcomputers to send and receive data, because sending and receiving share a buffer, we usually need to add a "while(! TI );" statement after sending a byte of data to wait for the data to be sent; when receiving data, we need to use interrupts to process, and the CPU must be interrupted once every time a byte of data is received. With the DMA function, there is no need to waste CPU time in this way, which can greatly improve the real-time performance of the CPU.
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