A WPAN network equipment solution

　　The IEEE 802.15.4-2003 protocol specifies 27 communication channels: 1 at 868 MHz with a rate of 20 kbps; 10 at 915 MHz with a rate of 40 kbps; and 16 at 2.45 GHz with a rate of 250 khps. It supports three topological structures: star, tree, and mesh. According to the functional division, there are two different types of devices in the network: fully functional (FFD) and reduced functional (RFD). In order to simplify the protocol, IEEE 802.15.4-2003 meets the OSI reference model, specifies the physical layer and MAC layer, each layer completes its own specified tasks, and provides a service task interface to the upper layer. The data communication methods in the protocol can be divided into direct data transmission and indirect data transmission, and are packaged and sent out in the form of data frames. The network can work in superframe and non-superframe modes. In order to improve its reliability, it adopts the CSMA/CA media access control mechanism, the confirmation frame response method and the CRC-16 ITU verification mechanism, and can add some data encryption and security control modes. For low power consumption and low cost considerations, the physical layer has only 14 service primitives and the MAC layer has 35 primitives. Compared with Bluetooth, these primitives are only 1/3 of it.

　　1 Hardware Circuit Design

　　In general, the basic structure of IEEE802.15.4 network equipment is shown in Figure 1. The power supply of the system is usually provided by a battery, or by a voltage regulator module. The RF transceiver chip is responsible for the generation and reception demodulation of the RF signal, and its reference clock is provided by an external high-precision crystal oscillator; at the same time, it must realize some basic functions of the physical layer and MAC layer, such as encoding and decoding, channel selection, power control, receiver energy detection (RSSI), link quality indication (LQI), idle channel assessment (CCA) and hardware CRC check. Under the premise of realizing these basic functions, the RF chip should be as low power consumption, high sensitivity and small package as possible. The microcontroller should have abundant resources to complete the control of the RF chip, as well as the real-time response to sensors, various application interfaces and user interfaces. Usually, the protocol stack needs to occupy about 32 KB of storage space.

　　1.1 AT86RF230 Performance and Internal Structure

　　Atmcl's AT86RF230 is a wireless RF transceiver chip compatible with ZigBee/IEEE802.15.4. It operates in the 2.4 GHz ISM band, has a 104dB link budget, -101 dB receiving sensitivity and 3 dB transmission power, thereby reducing the total number of node devices required in the network and greatly reducing the networking cost of the IEEE 802.15.4 system. All RF key components (except antennas, crystal oscillators, and decoupling capacitors) are integrated into a chip, and the package form adopts a 32-pin, 5 mm×5mm×0.9mm QFN package. The device composed of this chip requires only 6 external components, and the functional block diagram is shown in Figure 2. The terminal node is usually battery-powered, with a current consumption of 17 mA in transmit mode, 15 mA in receive mode, and only O.7μA in sleep mode; the operating voltage can reach 1.8~3.6V, and there is an integrated 1.8V LDO inside. AT86RF230 has 35 8-bit registers that can be accessed through SPI control timing. There are 8 basic states when working (can be expanded to 14 as needed). The buffers for sending data and receiving data on the chip are 129 bytes and 130 bytes respectively, which can just meet the maximum frame length of 127 bytes specified by the IEEE802.15.4 protocol. A 2-byte CRCl6 check code is required when sending, and an additional 1-byte link quality indicator is required when receiving.

　　1.2 Hardware circuit composition of network equipment

　　The schematic diagram of the main hardware parts is shown in Figure 3. The digital interface of the module is the SPI interface between ATmega128l and AT86RF230 and other 4 control lines. AT-megal28l is an 8-bit high-performance AVR microcontroller from Atmel. Its basic features are: it adopts RISC architecture, has 135 instructions, and can reach a throughput of 16MIPS when working at 16MHz; it has 128KB Flash, 4KB on-chip E2PROM and 8KB SRAM, and can download programs through ISP or JTAG; the operating frequency can reach up to 16MHz, the operating voltage is 1.8~5.5V, and the operating current is only 0.1μA in power-down mode. In this design, ATmegal281 works at an internal oscillation frequency of 8MHz. If an external clock signal synchronized with AT86RF230 is to be used, the CLKM pin should be connected to the XTAL1 pin of ATmegal281, and the fuse bit should be set to the external clock. The various working status interrupt signals of AT86RF230 are controlled by the IRQ pin, which is connected to the ICPl pin of ATmegal281 to generate a capture interrupt, because the capture interrupt can reduce external interference by setting the noise elimination mode, thereby improving the reliability of the interrupt. For the specific methods of SPI read and write timing, state transition diagram and various interrupt control of AT86RF230 registers, please refer to the references. It should also be noted that the long-term working frequency stability of the external crystal oscillator X1 connected to AT86RF230 should be less than or equal to 40 ppm, and the appropriate load capacitor should be selected according to the driving capability of the crystal oscillator and the chip. [page]

　　The basic process is: the network coordinator first initializes the WPAN information database, establishes the ZigBee network, allocates the network ID number and 16-bit network address, initializes the neighbor device table, and then waits for other nodes to connect; after the network node is powered on, it initializes the internal resources and the WPAN information database of the network node, sends a scan signal to request a connection, and after the connection is successful, records the network ID and the allocated 16-bit network address, and sends information to the coordinator according to the function setting. Because the network node is generally battery-powered, it must enter a dormant energy-saving state when idle. Peripheral circuit control is mainly for the control of sensors, switches and other devices, and the software can be modified accordingly according to different needs.

　　3 Test results and summary

　　Figure 6 shows the output spectrum of the modulated signal at 2.405 GHz on the 11th channel, from which the frequency corresponding to the maximum power can be seen. In an open environment, the bit error rate of communication can be less than 1% at a distance of 150 m. The system consumes 23.7 mA in the transmitting state, 21.78 mA in the receiving state, and only 2.5 μA in the sleep state. The experimental results show that the WPAN network device based on the AT86RF230 transceiver designed in this paper has the advantages of high fault tolerance, superior performance, ultra-low power consumption, and low price, and can meet the actual needs of various occasions.