F28335 PWM trigger ADC sampling code + comments

Jacktang

F28335 PWM trigger ADC sampling code + comments [Copy link]

Program features:

1 PWM generation

2 PWM trigger 3-way sampling

Note: It is mainly to configure the event trigger module in the EPWM module, and then write the program for sampling and reading data into the PWM interrupt.

#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File

#define POST_SHIFT 0 // Shift results after the entire sample table is full
#define INLINE_SHIFT 1 // Shift results as the data is taken from the results regsiter
#define NO_SHIFT 0 // Do not shift the results

// ADC start parameters
#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
#endif
#define ADC_CKPS 0x0 // ADC module clock = HSPCLK/1 = 25.5MHz/(1) = 25.0 MHz
#define ADC_SHCLK 0x1 // S /H width in ADC module periods = 2 ADC cycle
#define AVG 1000 // Average sample limit
#define ZOFFSET 0x00
#define BUF_SIZE 6


volatile Uint16 SampleTable[BUF_SIZE];
volatile float adc0=0;
volatile float adc1=0;
volatile float adc2 =0;



void ChoseCap(void);
void EPwmSetup();
void SetCap1Mode(void);
void SetCap2Mode(void);

Uint32 t1=0,t2=0,t3=0,t4=0,T1=0,T2=0,t5,t6,t7,t8,T3,T4,i,led=0,freq=0,duty=1, T1_temp=1,T2_temp=1;
interrupt void ISRCap1(void);
interrupt void ISRCap2(void);
interrupt void epwm_int(void);
void InitCapl();
Uint16 array_index;


void main(void)
{

InitSysCtrl();

EALLOW;
SysCtrlRegs .HISPCP.all = ADC_MODCLK; // System peripheral clock is divided by 6, usually ADC uses 6 division
// This is because the ADC can only be configured with a maximum frequency of 25MHz
// So the fastest conversion time is 80ns
EDIS;

InitXintf16Gpio();


DINT;

InitPieCtrl();

IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();

InitAdc(); //This initialization procedure must add the DSP2833x_Adc.C file

EALLOW;
PieVectTable.EPWM1_INT = &epwm_int;
EDIS;

IER |= M_INT3;
//IER |= M_INT14;

PieCtrlRegs.PIEIER3.bit. INTx1 = 1;
EINT;
ERTM;

AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK; //ADC sampling time selection
AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS; //ADC core frequency division
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; //Cascade working mode
AdcRegs.ADCTRL3.bit.SMODE_SEL= 0; // Sequential sampling
AdcRegs.ADCTRL1.bit.CONT_RUN = 1; //Continuous sampling
AdcRegs.ADCTRL1.bit.SEQ_OVRD = 1; //After completing the sorting, the sorter pointer returns to the initial state

AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x2;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1; //Software starts the conversion function
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0x1; //Allow interrupt requests to the CPU

for (i=0; i<BUF_SIZE; i++)
{
SampleTable[i] = 0;

}


EPwmSetup();

for(; ;)
{

}

}

interrupt void epwm_int(void)
{

led++;
if(led==100)
{led=0;}
if(array_index>BUF_SIZE)
array_index = 0;

while(AdcRegs.ADCST.bit.INT_SEQ1 == 0); //Wait for ADC interrupt bit to be 1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; //Clear sequencer interrupt


bitSampleTable[array_index++]= ( (AdcRegs.ADCRESULT0)>>4);
SampleTable[array_index++]= ( (AdcRegs.ADCRESULT1)>>4);
SampleTable[array_index++]= ( (AdcRegs.ADCRESULT2)>>4);

adc0=(float)SampleTable[0] * 3.0 /4096.0; // Convert to the data type we read
adc1=(float)SampleTable[1] * 3.0 /4096.0; // Data type conversion is explained in another article
adc2=(float)SampleTable[2] * 3.0 /4096.0;


PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
EPwm1Regs.ETCLR.bit.INT=1;

}



#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File


#if (CPU_FRQ_150MHZ)
#define CPU_CLK 150e6
#endif
#if (CPU_FRQ_100MHZ)
#define CPU_CLK 100e6
#endif
#define PWM_CLK 10e3 // If diff freq. desired, change freq here.
#define SP CPU_CLK/(2*PWM_CLK)
#define TBCTLVAL 0x200E // Up-down cnt, timebase = SYSCLKOUT

#define UP_DOWN 2
#define UP 0
#define DOWN 1

#define CDIV_NO 0
#define CDIV_2 1
#define CDIV_4 2
#define CDIV_8 3
#define CDIV_16 4

#define HDIV_NO 0
#define HDIV_2 1

#define HDIV_4 2
#define HDIV_6 3
#define HDIV_8 4
#define HDIV_10 5

#define T_1US 75
#define T_1MS 7500


void EPwmSetup()
{
InitEPwm1Gpio();
// InitEPwm();
// EPwm1Regs.TBSTS.all=0;
EPwm1Regs.TBPHS.half.TBPHS=0; //Clear all
phasesEPwm1Regs.TBCTR=0; //Clear time base counterEPwm1Regs.TBPRD =

75; //TBPRD 65536
EPwm1Regs.CMPA.half.CMPA = 37;
EPwm1Regs.CMPB = 30;


EPwm1Regs.TBCTL.bit.CTRMODE = UP_DOWN; //Increase
countEPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Disable phase controlEPwm1Regs.TBCTL.bit.PRDLD
= TB_SHADOW; //Use shadow register modeEPwm1Regs.TBCTL.bit.SYNCOSEL
= TB_SYNC_DISABLE; //Turn off the synchronization signal
EPwm1Regs.TBCTL.bit.HSPCLKDIV = HDIV_NO;
EPwm1Regs.TBCTL.bit.CLKDIV = CDIV_NO; EPwm1Regs.CMPCTL.bit.SHDWAMODE

=
CC_SHADOW; .LOADAMODE
= CC_CTR_ZERO ; EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR; // EPwm1Regs.AQCTLB.all=0; // EPwm1Regs.AQSFRC.all=0; // EPwm1Regs.AQCSFRC.all=0; EPwm1Regs.DBCTL.all=0xb; // EPWMxB is inverted EPw m1Regs.DBRED=0; EPwm1Regs.DBFED=0 ; EPwm1Regs.TZSEL.all=0 ; EPwm1Regs.TZCTL.all = 0; EPwm1Regs.TZFRC.all=0; EPwm1Regs.ETSEL.all=0; // Interrupt when TBCTR = 0x0000 EPwm1Regs.ETFLG.all=0; EPwm1Regs.ETCLR.all=0; EPwm1Regs.ETFRC.all=0 ; EPwm1Regs.PCCTL.all=0; EPwm1Regs.ETSEL.bit.INTEN =1; // Turn on event trigger interrupt EPwm1Regs.ETSEL.bit.INTSEL=1; // One event trigger EPwm1Regs.ETSEL.bit.SOCAEN =1; // Enable epwmxSOCA signal EPwm1Regs.ETSEL.bit.SOCASEL=4; // Count up TBCTR = CMPA to generate epwmxSOCA signal EPwm1Regs.ETSEL.bit.SOCBEN =1; //Enable epwmxSOCB signal generation EPwm1Regs.ETSEL.bit.SOCBSEL=4; //Count up TBCTR=CMPB to generate epwmxSOCB signal EPwm1Regs.ETPS.bit.INTPRD =1; //Generate SOC signal at the first event EPwm1Regs.ETPS.bit.SOCAPRD=1; EPwm1Regs.ETPS.bit.SOCBPRD=1; EPwm1Regs.ETCLR.bit.INT=1; }

toothache

Not bad!!

Nice code!