Design of Pulse Signal Acquisition Card Based on 80C196

In the fault monitoring systems in the fields of radar, sonar and industrial control, it is often necessary to collect the echo signals of radar and sonar or the fault signals in the fault monitoring system. Since these signals appear randomly, and the amplitude, pulse width and shape of these signals vary greatly. Some signal pulse widths may be very narrow, while others may be wider, and the duty cycle is uneven. If the traditional fixed sampling rate acquisition method is used, it cannot meet the real-time processing requirements. Because, for narrow pulse sampling, the sampling rate is required to be very high. If the continuous sampling method is used, the amount of collected data is too large, and the collected data cannot be processed in time, which cannot meet the requirements of real-time analysis of collected signals or real-time processing of faults. For this reason, a random pulse signal acquisition card is developed, and its basic working principle is: when a random pulse signal appears, the high-speed acquisition circuit works, and when there is no pulse signal, the high-speed acquisition circuit stops working. Since the average duty cycle of the random pulses required to be collected in the above-mentioned applications is very small, the amount of data collected by the random pulse signal acquisition card is not very large, and the collected data can be processed and analyzed in real time, and the special needs of the above-mentioned fields can be met.

　　1 Random pulse signal acquisition card

　　The hardware block diagram of the random pulse signal acquisition card is shown in Figure 1. It is mainly divided into five module circuits: input and output interface, amplitude acquisition and control, microcontroller operation and control, host interface control, and signal replay.

　　1) Input interface circuit This module circuit mainly includes random signal input and processing, high-speed A/D sampling, GPS signal input and frequency division, other digital signal input and other circuits.

　　2) Random pulse processing circuit This module circuit can amplify and limit the random pulse, and the amplification factor is not less than 200 times, ensuring that the peak level of the random pulse signal greater than 25 mV is close to 5 V after amplification, meeting the requirements of the TTL level signal. This signal is used as a trigger pulse signal for the sampling control circuit, the pulse width measurement 32-bit clock circuit and the HIS input circuit of the 80C196 microcontroller, controlling the collection and stop of the pulse and the counting of the pulse width measurement circuit.

　　3) Amplitude acquisition and control circuit This circuit mainly includes high-speed A/D sampling circuit and sampling control circuit. In addition, 80C196 also contains a signal amplitude acquisition circuit.

　　4) High-speed A/D sampling circuit This circuit samples random pulses at high speed, and its sampling frequency is set by the microcontroller.

　　5) GPS signal input and frequency division circuit This circuit provides standard time for the system and also provides an hourly reset pulse signal for the 32-bit clock of pulse width measurement.

　　6) Pulse playback circuit This circuit can convert the collected pulse signal data into corresponding pulse signal output for display or listening.

　　7) Other digital signal input circuit This circuit includes some control parameters provided by the host to the microcontroller (such as the sampling rate of high-speed A/D) and some other input digital signals (such as digital signals such as the azimuth and carrier frequency of radar pulses).

　　8) Output interface circuit This circuit mainly includes a large-depth FIFO circuit and a status latch circuit, etc., which are used for the interface between the acquisition card and the host.

　　2 Working Mode

　　The random pulse signal acquisition card has two working modes: one is the single pulse amplitude measurement mode completed by the single chip microcomputer; the other is the pulse amplitude high-speed sampling mode used for special pulse waveform measurement. In the first working mode, the pulse amplitude measurement is completed by the A/D conversion circuit inside the 80C196 single chip microcomputer, and each pulse is sampled and measured only once. Although the pulse width and pulse arrival time can be measured by the HIS (high-speed input channel) circuit of the 80C196 single chip microcomputer, the measurement accuracy does not meet the requirements. Therefore, a 32-bit time counter and its corresponding two sets of latches and other circuits are added to measure the pulse width and pulse arrival time. In the second working mode, the pulse amplitude measurement is completed by the added high-speed A/D conversion circuit. The high-speed A/D sampling measurement circuit is started by the rising edge of each pulse, and a delay circuit is triggered by the falling edge of the pulse. After a delay period, the high-speed A/D sampling measurement circuit is stopped by the falling edge of the delay circuit. The sampling rate of the high-speed A/D sampling measurement circuit can be set by the host according to needs, and the maximum sampling rate can be set to 20 MHz. The measurement of pulse width and arrival time is the same as that of the first working mode.

　　3 System Hardware Circuit Design

　　The hardware circuit of this system mainly includes the random pulse amplification and limiting circuit in the main system of the single-chip microcomputer, the pulse amplitude and pulse width measurement circuit, the high-speed signal acquisition and storage circuit and the control signal circuit composed of EPLD, etc.

　　3.1 Random pulse amplification and limiting circuit

　　The random pulse amplification and limiting circuit completes the amplification, limiting and shaping of the pulse signal to meet the requirements of the TTL input terminal signal. Figure 2 shows the random pulse amplification and limiting circuit, which uses the high-speed operational amplifier OPA603, which has the characteristics of wide bandwidth and high conversion rate, and is suitable for pulse amplification circuits. The input pulse signal is amplified and limited in two stages. The output pulse signal is sent to the input end of the high-speed input device of 80C196.

　　Figure 3 is a schematic diagram of the pulse amplitude and width measurement circuit. The built-in 10-bit A/D conversion circuit of the single-chip microcomputer (80C196) completes the measurement of the pulse amplitude. The pulse counting circuit composed of 74LSl61 measures the pulse width. The main system circuit is responsible for the control of the entire system, the setting of the sampling frequency, and the related data processing and control transmission. Its working principle is: the random pulse signal (Vin) is sent to the analog signal input terminal ACH6 of the 80C196, and then the internal 10-bit A/D converter of the 80C196 performs sampling and conversion. At the same time, the random pulse signal is amplified, limited and shaped. The pulse signal (Vout) is sent to the HSI0 and HSI1 terminals of the high-speed input device as the trigger event of the leading and trailing edges of the pulse to start the interrupt processing program. The HSI0 input terminal is used as the leading edge (rising edge) event trigger input terminal of the pulse signal, which is used to read and record the arrival time of the leading edge of the pulse and start the A/D converter for sampling and conversion; the HSI1 input terminal is used as the trailing edge (falling edge) event trigger input terminal of the pulse signal, which is used to read and record the arrival time of the trailing edge of the pulse and read the value of the A/D converter. In addition, one signal (CLK1) of the shaped pulse signal (Vout) is sent to the CLK terminal of a group of 7415374 (4 pieces) to latch the count value of the 74Lsl61 counter (that is, the arrival time of the leading edge of the pulse). Another signal (CLK2) output by the inverter is sent to the CLK terminal of another 74LS374 (4 pieces) to latch the count value of the 74LSl61 counter (that is, the arrival time of the trailing edge of the pulse). The width of the pulse signal is the difference between the two count values.

3.2 High-speed signal acquisition and storage circuit

　　The high-speed signal acquisition and storage circuit is used to collect the pulse waveform data of the input pulse when the acquisition card is in acquisition mode. It uses an 8-bit high-speed A/D converter TLC5540 with a maximum conversion speed of 40 MS/s, an analog input bandwidth greater than 75 MHz, and an internal sampling and holding function.

　　The clock signal frequency required for TLC5540 conversion can be set by the microcontroller. The data after A/D conversion is automatically stored in the external 62256 memory, and its address signal is generated by four 74LSl61. Its working principle is: first, QCLR outputs a negative pulse to clear the 74LSl61 counter, and then sets the sampling clock signal (TCLK) to start TLC5540 for conversion, and at the same time sets the RAD signal to valid (low level). The generated data is written into the external 62256 memory in sequence when the pulse signal (Vout is high level) appears, and the writing is automatically stopped when the pulse signal (Vout is low level) disappears. The address signal of the high-speed RAM is provided by the 74LSl61 address generator. The number of samples during each pulse signal can be calculated based on the difference between the last written addresses of the two pulse signals, that is, the count value of the 74LSl61 at the falling edge of the pulse signal read by the microcontroller (that is, the address of the RAM last written), minus the value read last time, which is the number of samples of the pulse. After continuously sampling the waveform data of a group of pulses, the acquisition needs to be paused. The waveform data of each pulse acquired is combined with other parameters of the pulse (such as pulse width, pulse arrival time, etc.) in a specified format and sent to the FIF0 high-speed memory that exchanges data with the host for the host to read and process. After the data is sent, the acquisition of the next group of pulses is started. The number of a group of pulses is determined by the user according to the actual situation, and the maximum limit is that the continuously acquired waveform data can be stored in the high-speed RAM without overflow. Figure 4 shows the high-speed signal acquisition and storage circuit. [page]

　　4 System Software Design

　　The signal acquisition card is controlled by the single-chip microcomputer 80C196. In addition to collecting random pulse signals, the single-chip microcomputer also undertakes the task of organizing related data (such as carrier frequency data and azimuth data in radar) and random pulse data into a complete signal data structure. Figure 5 is the main program flowchart of the acquisition card. Its working process is as follows: First, 80C196 sets the acquisition card working mode by reading the command word sent by the host (PC) and executes the corresponding working subroutine. Figure 6 is the subroutine flow in the measurement mode. Its working process is as follows: First, initialize the measurement mode and allow HIS interrupt. When the pulse appears, start the measurement interrupt handler (HIS interrupt) to start the A/D converter inside the 80C196, measure the amplitude of the input random pulse, and read the pulse arrival time and pulse width and other data and send them to the sampling buffer, and exit the HIS interrupt. Then the collected random pulse data and other related data collected at the same time (such as carrier frequency data, azimuth data, etc. in the radar) are stored in the sending buffer, and finally organized into data blocks according to the agreed data format and stored in the deep "first in first out (FIF0)" buffer, and then the host is notified to read these data. To ensure the integrity of data transmission, the deep FIF0 is organized into a double buffer structure, and information is written and read in turn in a pipeline manner, thereby avoiding the data loss that may occur when the CPU of the signal acquisition card and the host CPU read/write FIF0 at the same time. In the acquisition mode, it is necessary to start the high-speed A/D acquisition circuit, organize the data according to the requirements of the waveform display, and then send it to the host for processing.

　　5 Conclusion

　　The acquisition card is designed with 80C196 single-chip microcomputer, 8-bit high-speed A/D conversion TLC5540 and EPLD devices to realize counting, latching and other logic circuits, and cleverly uses the interrupt characteristics of the high-speed input channel (HSI) of the 80C196 single-chip microcomputer to not only realize the amplitude measurement of random pulse signals or the acquisition of intra-pulse waveform data, but also record the pulse arrival time and pulse width, solving the problem of large amount of collected data and inability to process in real time when the data acquisition card collects random narrow pulse signals. The acquisition card has been successfully applied to the signal acquisition of a certain type of radar reconnaissance equipment. It can fully collect and process the received radar pulse signals in real time and send them to the host. The host further sorts and processes the collected signals, and can fully display the collected radar pulse waveform in real time. Practical application shows that the designed acquisition card works stably and reliably, the narrowest pulse that can be collected is not less than 0.1μs, and continuous pulses with a period of no more than 25 kHz can be sampled uninterruptedly in the measurement mode.