Extension of low voltage power line carrier communication interface based on PL2101

The interface circuits of early low-voltage power line carrier communication chips were relatively complex, with poor anti-interference capabilities, and most of them were foreign products with low cost performance. Therefore, single-chip microcomputer systems rarely use low-voltage power line carrier communication. With the development of communication technology, new low-voltage power line carrier communication interface chips have solved the above shortcomings, making it simple and easy to use low-voltage power line carrier communication in single-chip microcomputer systems.

Introduction to PL2101PL2101
adopts two-phase phase shift keying, carrier frequency 120KHz, bandwidth 15KHz, and transmission rate 500bps. It is powered by a single +5V power supply, the interface with the microcontroller is simple, the peripheral analog transmission/receiving circuit is also relatively simple, and no external analog mixer is required when working.PL2101 has 5 practical functional circuits built in: clock circuit, 32 Bytes SRAM, voltage monitoring, watchdog timer and reset circuit. Among them, the clock and SRAM can continue to work with the 3V backup battery after the main power is off.

The hardware circuit design of low-voltage power line carrier communication interface
of single-chip computer is designed by using PL2101. The half-duplex transceiver control terminal, HEAD (data synchronization terminal), RXD_TXD (half-duplex data transceiver, data input/output terminal) pins of PL2101 are used to send and receive data with single-chip computer and DSP processor to realize low-voltage power line carrier communication function; the register inside PL2101 adopts standard I2C interface (composed of SCL and SDA pins for operation; in addition, the WDI (watchdog counter reset input terminal) and RESET (power-on and watchdog counter overflow reset output) and PFo (power failure indication terminal) are used by the microcontroller to monitor the working status of PL2101.
The principle of using PL2101 to expand the low-voltage power line carrier communication interface for the MSP430 microcontroller. The interface part of PL2101 and MSP430F149, the peripheral analog transmission/receiving circuit of PL2101 can refer to the typical circuit of the chip manual. Use the P1 port of MSP430F149 and the 8 pins of PL2101 Connection. Use the P1.6 pin of the MSP430F149 with interrupt function to connect HEAD to send/receive data from PL2101 in interrupt mode; because the MSP430F149 does not integrate the I2C bus interface, the MSP430F149 uses the P1.2 and P1.3 pins to simulate the I2C timing to access the internal registers of PL2101; in addition, because the MSP430F149 uses 3.3V logic level, the PL2101 uses 5V COMS logic level, so the pins cannot be directly connected, and level conversion is required.
Data transceiver software design
MSP430F149 only needs to operate the P1 port to transmit and receive data through PL2101, and realize low-voltage power line carrier communication with other microcontrollers.
The microcontroller sends/receives data to PL2101. When PL2101 is in the transmitting state relative to the microcontroller, PL2101 latches and outputs the internal demodulated data by the rising edge of HEAD, and the external microcontroller can read the data received by PL2101 from the power line after the falling edge of HEAD. When PL2101 is in the receiving state, PL2101 latches the data of RXD_TXD on the rising edge of HEAD, allowing the external microcontroller to place the data on the RXD_TXD pin after the falling edge of HEAD, and PL2101 sends it to the power line.
MSP430F149 receives data flow. The program adopts the form of a subroutine and uses interrupt mode to receive data. The data sending process of MSP430F149 is similar to the receiving process. It can be seen that the software design of sending/receiving data through PL2101 is relatively simple.
PL2101 configuration and monitoring software design
The configuration of PL2101 is realized by operating its internal registers. After PL2101 is powered on and reset, except for the write protection register, other registers are in write protection state. After the microcontroller system powers on and resets PL2101, it should first write 1xxx xxxx B to the write protection register of PL2101 to open the write protection, and then write relevant data to the capture threshold register according to the characteristics of the power grid to configure PL2101.
When the external microcontroller reads and writes the internal register of PL2101, it first generates a start bit to start the I2C bus. According to the chip requirements, the external microcontroller must issue the device code (1011000, high 7 bits) and the read and write control bit (0, indicating write, the lowest bit). When the data is correct, PL2101 will issue the first confirmation bit. After the external microcontroller reads it, it will issue the read and write address, and then the external microcontroller waits for PL2101 to send the second confirmation bit.
After the external microcontroller reads the second confirmation bit issued by PL2101, if you want to write a byte to the internal register of PL2101, you can directly send the data. When PL2101 receives and sends the third confirmation bit, the external microcontroller should send a stop bit to end the write operation.
MSP430F149 writes the internal register of PL2101. It also uses the subroutine form. Please refer to the relevant information for the I2C bus timing, which will not be discussed in this article.
After the external microcontroller reads the second confirmation bit sent by PL2101, if you want to read a byte of the internal register of PL2101, you must send a bus start bit again, send a device code and a read-write control bit (1 means read). After receiving it, PL2101 will send 8 bits of data after sending the third confirmation bit, which will be received by the external microcontroller. After the external microcontroller receives it, it can send a non-confirmation bit and an end bit to end the read operation; if the external microcontroller sends a confirmation bit, PL2101 will send the register data of the next address until the external microcontroller sends a non-confirmation bit and an end bit to end the read operation. The
software design of the PL2101 monitoring part is relatively simple. It can be achieved by periodically clearing the WDI pin of PL2101 and scanning the PFo pin. The RST operation can restore PL2101 to normal working state.

Conclusion
For the communication of single-chip microcomputer system, in addition to the widely used RS-232, 485 and other methods, the low-voltage power line carrier communication based on the new interface chip is also a good choice. ■

References

[1]. MSP430F149 datasheet http://www.dzsc.com/datasheet/MSP430F149.html.
[2]. MSP430 datasheet http://www.dzsc.com/datasheet/MSP430_490166.html.
[3]. RS-232 datasheet http://www.dzsc.com/datasheet/RS-232_584855.html.
[4] Wei Xiaolong. MSP430 series microcontroller interface technology and system design examples. Beijing: Beijing University of Aeronautics and Astronautics Press, 2002.
[5] Beijing Fuxing Xiaocheng Electronic Technology Co., Ltd. PL2101 chip manual.