MCS-51 MCU memory organization structure-EEWORLD

Collect

The computer memory management mode can be roughly divided into two categories. The first is to separate the program memory and data memory, and have their own addressing mechanism and addressing mode. This structure is called Harvard structure. The other is to manage the memory logic space in a unified manner, and ROM or RAM can be arranged at will. The same instruction is used when accessing. This structure is called Princeton type. The memory structure of MCS-51 single-chip microcomputer belongs to the former, and the general microcomputer belongs to the latter.

The data memory RAM also has a 64KB addressing area, which overlaps with the ROM in terms of address. MCS-51 uses different signals to select ROM or RAM: when fetching instructions from the external ROM, the selection signal is used , and when reading and writing data from the external RAM, the read and write signals are used to select. Therefore, there will be no confusion due to address overlap.

Keywords：MCS-51 Reference address：MCS-51 MCU memory organization structure

Previous article：Internal structure of MCS-51 microcontroller
Next article：STC12C5A60S2 series dual serial port 1T 8051 MCU header file

Recommended ReadingLatest update time:2024-11-16 19:56

Software anti-interference experience 3: RAM redundancy technology

Software anti-interference experience 3: RAM redundancy technology The so-called RAM redundancy is: 1. Back up 2 (or more) copies of important data and store them in different areas of RAM (meaning the addresses are not connected). 2. When modifying these data, the backup is also updated 3. When interference

[Microcontroller]

Micron’s second-generation HBM3 memory achieves simultaneous improvements in bandwidth, efficiency and speed

Micron aims to achieve a balance of high bandwidth, efficiency and speed with its latest generation of high-bandwidth memory (HBM3) technology. Micron Technology recently announced that the “industry’s first” HBM3 Gen2 memory chip has entered the sampling stage. As generative AI models become more common, designers

[Embedded]

Micron’s second-generation HBM3 memory achieves simultaneous improvements in bandwidth, efficiency and speed

Breaking the memory wall! Innosilicon launches the world's first GDDR6X video memory technology

Recently, at the 2022 Zhuhai Software and Integrated Circuit Industry Annual Conference and Digital Economy Innovation and Industry Development Forum, Innosilicon officially released the world's first GDDR6X high-speed video memory technology. Currently, this technology has supported the innovative breakthro

[Embedded]

Breaking the memory wall! Innosilicon launches the world's first GDDR6X video memory technology

s3c2440 bare metal-memory controller (1. Principle of memory controller)

1. Memory interface concept S3C2440 is a system on a chip, with a GPIO controller (connected to GPIO pins (GPA-GPH)), a serial port controller (connected to TXD RXD pins), a memory controller, a Nand controller, etc... 1. Different types of controllers: (1) The GPIO controller is a gate circuit, does not involve tim

[Microcontroller]

s3c2440 bare metal-memory controller (1. Principle of memory controller)

OK6410A Development Board (VIII) 122 linux-5.11 OK6410A Using user space memory from the perspective of Linux users

Using user space memory from the perspective of Linux users // In user space, it is managed in the form of segments In kernel space, these segments are managed by VMA // VMA in https://blog.csdn.net/u011011827/article/details/117335579 Code segment memory By increasing the code length Specify a segment as a c

[Microcontroller]

The party is about to lose. DDR5 memory prices will increase starting this month: Samsung and other manufacturers are looking forward to the dawn.

According to news on July 17, memory and SSD hard drives are products with surprising prices in the past two years, which have driven everyone's enthusiasm for buying 32GB memory or 2TB large-capacity storage. However, after entering the second half of 2023, the market trend is also changing. Prices are thought to hav

[Semiconductor design/manufacturing]

stm32 memory problem

Background When I was refactoring the code recently, I found a memory bug. I didn't have time to record this problem at the time, so I will just record it briefly this time. Problem Description After printing, I found that the data in the code would be changed inexplicably. A global search found that there was no pl

[Microcontroller]

Microsoft Surface Pro 8 decrypted: Core i3 "beggar's edition" finally equipped with 8GB of memory

The Surface Pro product line has not been updated for two years. It is reported that Microsoft will launch Surface Pro 8 and Surface Laptop 4 simultaneously as early as next spring. 　　The latest news from WinFuture said that the configuration of Surface Pro 8 has been finalized. The entry-level version will be e

[Mobile phone portable]

Popular Resources
Popular amplifiers