Design of the communication module of serial port to FSK based on AVR microcontroller

With the rapid development of information technology and network technology, information interaction application services have brought more convenience to human life, and information terminals have shown great market potential. However, due to different terminal user environments, user information interaction methods may be different. Currently, IP, FSK and wireless communication methods are commonly used. In order to improve the market competitiveness of terminals and reduce system development costs, independent design of communication modules and terminal programs is an ideal solution. This article uses ATmega48 chip and CMX865 chip to implement FSK communication module. Based on this module, FSK information interaction between users and service platforms is a simple serial port communication for terminals.

1 Introduction to ATmega48
ATmega48 is a high-performance, low-power 8-bit CMOS microcontroller based on AVR enhanced RISC (reduced instruction set) structure. The microcontroller has controllable power-on reset and programmable power-off detection circuits, calibrated on-chip RC oscillator, 18 on-chip and off-chip interrupt sources and 5 sleep modes. Due to its advanced instruction set and single clock cycle instruction execution time, the data throughput of ATmega48 is as high as 1 MIPs/MHz, and the running speed is 10 times higher than that of ordinary microcontrollers, which can alleviate the contradiction between power consumption and processing speed in the system.
It integrates 4 KB of system programmable Flash, 256 bytes of EEPROM, and 512 bytes of SRAM. Its peripherals include programmable serial USART interface, SPI serial interface that can work in master/slave mode; there are 2 8-bit timer/counters with independent prescaler and comparator functions and 1 16-bit timer/counter with prescaler, comparison function and capture function, programmable watchdog timer with independent on-chip oscillator, etc. The hardware circuits of ATmega48/88/168 chips are fully compatible, and AVR chips can be flexibly selected according to the actual needs of the software, which greatly facilitates the development and research of the system.

2 Introduction to CMX865
CMX865 is a new DTMF encoder/decoder/FSK modem composite IC chip from CML. It uses a single high-speed serial bus control and is compatible with most serial interfaces. The main features of CMX865 are:
◆ Supply voltage 2.7~5.5 V, low power operation mode;
◆ Support V. 23, Bell202 FSK 1200 bps encoding/decoding;
◆ Integrate high-reliability DTMF, encoder/decoder;
◆ Integrate ring detection function and support voice detection function.

3 Hardware Design
Figure 1 is the serial port to FSK communication module circuit. The system is mainly based on the AVR microcontroller ATmega48 chip and the CMX865 modulation/demodulation chip as the hardware architecture. The ATmega48 chip uses the C-BUS bus to control the CMX865 chip to realize FSK communication. The IRQN terminal of the CMX865 chip is connected to the external interrupt 0 (INT0) of the CPU chip to ensure that the software can receive/send FSK data in interrupt mode. The clock signal, chip select signal, response data signal and receiving control data signal of CMX865 chip are respectively connected to the common I/O interface pins of ATmega48 chip. CPU can control CMX865 chip through analog port line.

Figure 1 also provides a basic FSK receiving/transmitting data interface circuit and a ringing detection circuit. In the FSK transmitting circuit, the purpose of the external resistor at the TXA (pin 15) of the CMX865 chip is to match the AC impedance of the chip interface to the line. In the FSK receiving circuit, the capacitor between the RXAFB (pin 9) and RXAN (pin 10) of the CMX865 chip and the capacitor between the isolation transformer are designed to filter out high-frequency noise; by adjusting the resistance values ​​of the two resistors R1 and R2 in the receiving circuit, the amplitude of the signal provided to the CMX865 chip by the receiving end can be changed. In the ringing detection circuit, IC1 is a photocoupler. When not ringing, the phototransistor is cut off and RING is a high level; when ringing, the ringing signal is coupled by capacitors and stabilized by the voltage regulator. The ringing voltage makes the light-emitting diode in IC1 emit light, which is irradiated to the base of the phototransistor, causing the phototransistor to turn on, and RING is a low level. The low-level ringing signal is detected through the ATmega48 pin.
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4 Software Implementation
The ATmega48 chip has 4 KB internal Flash and 512 bytes of on-chip SRAM. The software implementation needs to consider resource allocation, especially the use of SRAM. Since the program involves three situations: serial communication, DTMF communication and FSK communication, six buffers need to be opened in theory. If so, the size of each buffer obviously cannot ensure that the actual communication data volume is met. Combined with the characteristics of FSK communication, DTMF data transmission and FSK data transmission cannot occur at the same time, so FSK and DTMF can share the same buffer. Similarly, serial port reception and FSK transmission, serial port transmission and
FSK reception will not occur at the same time, so communication only needs to open two buffers to ensure normal communication of the module. Considering the actual business platform data volume, the software design opens a 255-byte buffer for FSK reception and a 45-byte buffer for FSK transmission.
4.1 Main program implementation process
The communication module main program includes: CPU initialization, CMX865 initialization, initialization link establishment, serial communication and FSK communication subroutines. The main program flow is shown in Figure 2. Initialization link building is the basis for the normal operation of the module. Through the initialization link building operation, the information terminal can set the communication module parameters according to the line environment and the platform timeout mechanism to ensure the stability of communication. The main communication process loop executes three sub-function functions: line state processing function, serial port data parsing and processing function, and link maintenance function. The line state processing function designs three line states, namely the initial state, idle state, and off-hook state; it only switches between the idle state and the off-hook state during normal operation. In the idle state, the ringing is detected, and the off-hook and DTMF dialing operations are performed according to the state bit; in the off-hook state, the FSK transmission and reception, offline detection, on-hook control and other operations are performed according to the state bit. The serial port data parsing and processing function includes the serial port data parsing according to the command set, the response to the parsing command and the state setting processing part. In this way, the line state processing function and the serial port data parsing and processing function are closely connected through the state setting flag. FSK data is directly received by interrupt mode, and after receiving, it is directly sent to the information terminal through the serial port in the off-hook state. Since the serial port sending application is relatively simple, an instant response processing method is adopted to simply handle the serial port sending, which is implemented in each sub-function function of the main communication process, thereby improving the communication efficiency. The link maintenance function is used to determine whether the serial port communication is abnormal. The communication module periodically sends a link maintenance command to the information terminal. If the terminal response command is not received after three retransmissions, the communication module will automatically lock the line and re-execute the initialization link establishment operation to realize the handling of serial port abnormalities.

4.2 External serial communication protocol
The module uses standard serial communication, with a baud rate of 19 200 bps and 10-bit asynchronous mode. The serial communication data packet format is defined as: 0x1E+command+checksum inverse (checksum inverse of command), and some commands are sent in variable length. The main serial communication commands are: module initialization, link maintenance, DTMF reception/transmission, FSK reception/transmission, ringing, hanging up, etc. The specific format and description of the command are not detailed here. The module initialization is automatically initiated by the communication module after power-on. The communication module will not successfully establish a link until the terminal responds to the initialization command correctly. The information terminal initialization response command mainly provides FSK communication module parameter configuration information. After power-on, if the FSK module does not receive the terminal initialization response information, it will periodically (every 2 s) send an initialization link establishment command until it succeeds; during the module FSK communication process, the link maintenance command is periodically sent to the terminal. If the terminal response information is not received, the FSK link is disconnected and the module initialization is restarted.
4.3 Serial communication implementation
The serial communication of AVR microcontrollers often adopts SPI communication mode, and the serial communication of the communication module adopts UART0 control/status register and data register to realize. The serial communication subroutine mainly consists of three parts: serial send/receive interrupt subroutine, serial receive command parsing subroutine and serial packet sending subroutine. Among them, the serial interrupt receiving program is:

when executing serial data transmission, it is necessary to provide the transmission data length, the transmission start address, and set the UCSROB register value (UCSR0B |= 0x28). The serial receive command parsing subroutine parses the serial port command according to the external serial communication protocol, and calls the subroutine code according to the command description to perform the corresponding sub-function operation. In order to handle communication fault tolerance, the communication module needs to check the received serial port data. If the format of the parsed serial command is correct, it sends a positive response to the terminal; otherwise, it sends a negative response and waits for the terminal to retransmit the command data. The serial packet sending subroutine assembles the received FSK data and line status information data into packets according to the serial communication protocol and sends them to the information terminal.

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4.4 FSK communication implementation
The FSK communication subroutine mainly consists of CMX865 chip register operation, FSK receiving/sending, DTMF receiving/sending, and line status detection subroutines. The ATmega48 chip uses analog lines to read/write CMX865 registers. The CMX865 chip register read operation program is:

The FSK receiving/sending and DTMF receiving/sending subroutines are based on the CMX865 register read/write operation function. By setting the value of the CMX865 register, their working mode is determined. FSK data sending and receiving can cause ATmega48 chip interruption through the IRQ interrupt line of the CMX865 chip, so FSK data receiving/sending is realized through interruption. The chip program uses a 10 ms timer to cyclically detect the line status.

Conclusion
This paper uses ATmega48 chip and CMX865 chip as the hardware architecture to design a serial port to FSK communication module. Since the ATmega48 chip and ATmega88 chip have the same performance except for the difference in Flash, EEPROM, and SRAM capacity. The communication module can meet the demand of communication business for increased communication data volume without changing the hardware circuit, and only configure the corresponding AVR chip and slightly adjust the software, saving the cost of secondary development of the module. At present, this communication module has been used in a new type of electronic trading terminal, and has exchanged information with electronic trading platforms such as ZTE and Jinglun, and the operation effect is good.