Recently, during ICCAD 2019, Professor Wei Shaojun mentioned in his keynote speech that "customers are always our God. Only by continuously meeting customer needs and continuously creating value for customers can we ultimately realize our value."
In fact, in the electronic design industry chain, it has become a consensus to shift the focus from chips to the entire system design. Several big names in the electronic design industry chain discussed how to better serve customers, customers' customers and the entire industry based on their own businesses.
Walden C. Rhines, honorary CEO of Mentor, a Siemens Business, said that at the equipment level, chips, connections, networks and OEMs all need to cooperate accordingly. For this reason, Mentor has launched development tools such as high-level synthesis and a virtual test environment to facilitate system developers. Rhines pointed out that EDA tools are relatively easy to design and modify if system-level corrections are considered starting from high-level synthesis as the early stage of the entire chip design process. In addition, in the integration stage of PCB design and IC design, it is necessary to generate a data format that can be flexibly converted to assist each other.
Regarding virtual development, Rhines emphasized that the digital twin technology emphasized by Siemens can support all fields including motors, wafer fabs, and automobiles, allowing all data to be designed and verified in a virtual environment first, which can detect problems faster, reduce design costs and improve reliability.
Lin Weisheng, deputy general manager of sales at Hejian, said that for wafer fab customers, their needs are to obtain more services and less initial R&D investment. For this reason, as a foundry, Hejian not only provides customers with distinctive low-cost processes, but also helps customers provide more types of IP to accelerate their R&D process.
Liu Hui, general manager of Socionext China Division, said that Socionext's business is divided into two major sectors: ASSP (Application Specific Standard Products) and ASIC (Application Specific Customized Products). ASSP products include cloud server solutions, ultra-high-definition video codec solutions, ISP image processors, etc. Flexible relying on ASSP product technology and long-term accumulated design experience, Socionext also provides ASIC design services based on customer needs and demands. The service covers a one-stop solution from design and development to production, helping customers to achieve low power consumption, high performance and other functions at low cost and quickly put them into the market.
Dai Weimin, chairman and president of VeriSilicon, said that chip companies must be equipped with a large number of software developers, because the definition of chips must be based on the architecture, market positioning, and the entire application needs from a system perspective, so that their core competitiveness can be generated. "Now many system companies have begun to launch chip projects, but for them, setting up a group of complete chip design professional teams will be less cost-effective, so I recommend the Design-Lite light design mode. Not all work must be done by yourself, and some things that repeat the wheel (referring to standardized products) can be directly handed over to partners." Dai Weimin said.
Luo Zhenqiu, general manager of TSMC (Nanjing), said that as a foundry, TSMC is a little far away from terminal products and systems, but every process improvement, process innovation, power consumption reduction and transistor density improvement of TSMC have greatly promoted the development of system applications. "The development of the system is the development of the entire ecosystem, including EDA tools, IP, foundry, etc., which will have an impact on the whole. For example, in the 5G market we see, the launch of 5G technology is only a result. Before 5G products come out, all the relevant engineers behind the industry have finalized the specifications."
To this end, TSMC has set up an OIP platform to bring together system companies, EDA companies, system design companies, etc. to jointly formulate standards and make plans for future development. Luo Zhenqiu emphasized that no matter what system it is, it is best to unify it at the source so that we can work together and develop together.
Synopsys China Chairman and Global Senior Vice President Ge Qun said that if EDA tool vendors understand their customers' customers better before serving chip companies, they can better help customers solve practical problems. Ge Qun used his experience in promoting USB 2.0 IP as an example. He found that Chinese system manufacturers had some special requirements. For example, they wanted to use relatively cheap PCBs, which would affect the USB transmission rate. Many competitors' IPs can reach 480Mbps in theory, but they cannot be used in actual systems. Therefore, Synopsys launched USB 2.0 IP with a very large amount of redundancy to meet special requirements, helping customers solve the difficulties encountered in system applications.
Ge Qun also talked about the 5G market. As the most complex communication system at present, Synopsys will reverse the chip design challenges from the perspective of 5G applications, and provide better products and services for chip manufacturers based on different needs. For example, some 5G applications are base station applications, which do not care about power consumption, but have requirements for performance and throughput; while the chips placed in mobile phones require both performance and power consumption; for IoT applications, the most important requirement is the strict power consumption. For this reason, Synopsys has provided a complete set of solutions and reference designs for 5G design. No matter how many cores the processor has or what process it is, it can be designed using similar methods to reduce the development cycle.
In addition, in the face of the complex and rapidly developing 5G market, Synopsys has adopted a software-hardware collaborative solution. Before the chip is actually manufactured, parameter indicators can be obtained and simulated for verification, and modifications can be made before trial production, greatly shortening the trial and error time and cost of the chip. "Before advanced processes are implemented, we can test whether the chip meets the 5G standards, thereby minimizing code errors and better helping chip companies avoid detours and reduce risks," said Ge Qun.
Liu Shu of Arm mentioned that since the establishment of Arm China, it has laid out in the fields of CPU, artificial intelligence and security, including Xingchen processors, Zhouyi platform and Shanhai solutions. Now these three products have been successfully introduced to customers. From the perspective of Arm, it is important to focus on chip companies, but at the same time, including Zhouyi platform and Shanhai security solutions, it also involves cooperation with a large number of system manufacturers.
Dong Senhua, deputy general manager of HuaDa JiuTian, said that EDA is a bridge between foundry and design house, and it is naturally necessary to deal with upstream and downstream of the industrial chain. In the ten years since its establishment, HuaDa JiuTian has always insisted on deep binding with customers, from demand acquisition to product development and iteration, insisting on collaborative development and common growth with customers. At the same time, the development foundation of EDA comes from technology, and it is also necessary to cooperate with wafer fabs to develop PDK kits suitable for EDA tools so that products can better meet the development needs of technology and design.
Babak Taheri, CEO of Silvaco, said that Silvaco has a concept of design collaborative optimization. This design methodology forms a feedback loop from process to device to PDK and statistical analysis to achieve collaborative optimization. This requires each participant to work closely together and understand each other's needs.
Liu Mao, vice president of Cadence Nanjing Kaiding Electronics, said that as more and more system companies design their own chips, the integration of chip design and system design will be involved. The traditional independent approach is to first do functional verification, performance analysis, and back-end implementation, and then put the chip into the system to see the results. However, system companies need to be familiar with the performance of the system in the early stages, including thermal analysis, electromagnetic analysis, etc. As chip design becomes more and more complex and performance becomes higher and higher, heating problems begin to appear. If thermal analysis or electromagnetic analysis is still considered in the final stage, it will greatly affect the development time and cycle of the system. Therefore, Cadence began to introduce the concept of system design three years ago, including chip packaging, software design, electromagnetic analysis, thermal analysis, etc., which greatly speeds up the design process of system companies and reduces development time by 30% compared to the past.
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