Since the chiplet technology was widely publicized by Intel and AMD and successfully introduced, the technology has been constantly hyped and well-known in the past two years. During ICCAD 2019, Dai Weimin, Chairman and General Manager of VeriSilicon, Liu Hui, General Manager of Socionext China Business Unit, and Dr. Walden C. Rhines, Honorary CEO of Mentor, A Siemens Business, all expressed their views and opinions on this technology.
Chiplet is just the right time
. Dai Weimin said that Dr. Sehat Sutardja, founder of Marvell, proposed the concept of MoChi (Modular Chip) architecture at ISSCC 2015, which can be traced back to the prototype of chiplet technology, but it was too early at that time. Nowadays, as processors are getting bigger and bigger, product design and development are more expensive and take longer, so the chiplet model is relatively easier to accept. In addition, the advancement of packaging, process and other technologies has also enabled the advantages of chiplets to be fully utilized.
Dai Weimin emphasized that chiplets were not suddenly thought of, but a natural idea when the time and demand came.
Dai Weimin added that IP is an important element of chiplet, especially for current AI chips. AI algorithms are changing with each passing day, and AI main chips often change, and they are also the easiest to differentiate, so this part is relatively the most concerned by developers. However, standardized products such as video codecs do not need to be developed repeatedly, so this type of IP is suitable for making chiplet universal modules to help SoC shorten the development cycle and reduce development costs. This is one of the design
implementations of the "light design" model advocated by Dai Weimin, that is, if you don't have to do it yourself, don't do it, focus your energy and resources on the most important things for yourself, and do it yourself.
Analysis of the reasons for the birth of chiplets
Socionext Liu Hui said that the source of chiplets is that the evolution of digital logic in technology is faster than that of analog. There are no multiple iterations in digital, but simulation requires multiple iterations, which cannot keep up with the requirements of digital technology for technology. Therefore, when analog IP technology is introduced in the early process, it is difficult to match the progress requirements of digital chips.
Chiplet can solve two major problems. One is the existence of some complex and high-speed analog or interface circuits in the early stage of advanced process nodes; the other is the flexibility problem. For example, some chips have different requirements for the number of interfaces or analog channels in different scenarios. If they are all integrated on a die, they lack flexibility and it is difficult to achieve the best PPA. Chiplet better solves the problem of scenario flexibility through digital and analog.
At the same time, chiplet also faces many challenges, such as interface standardization, the huge amount of data between interfaces causing high power consumption caused by the interconnection between bare chips and bare chips, and the high cost of large-scale applications in the future.
Chiplet requires unified design process platform
. For chiplet, Mentor Honorary CEO said that this is the inevitable next step. "In terms of device integration, old technology is getting more and more backward, so new heterogeneous integration technology will have a market. Whether it is mixed signal, analog signal or RF technology, it can be packaged in the same chip."
Dr. Wally said that chiplet is not a new idea. In fact, module integrated packaging has been widely used in mobile phone RF.
The current packaging and testing costs are still too high, so the chip yield must be high enough to reduce costs. At this time, discrete chiplets can significantly reduce the manufacturing risk of large chips.
Dr. Wally mentioned that currently in the entire development process of heterogeneous integration, the technologies and terminology at each level are different, and most of the design processes are customized processes, including special SDKs, system design toolkits, etc. For this reason, Mentor also cooperates with many wafer fabs including TSMC to cooperate with the design process of wafer packaging and testing to achieve standard unification.
"For the future, chiplet technology is a very important physical technology, including vertical integration, which will have better development space." Dr. Wally emphasized.
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