Hardware Control RS485 Circuit Diagram Design

Publisher:TranquilJourneyLatest update time:2014-11-15 Source: 互联网 Reading articles on mobile phones Scan QR code
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  Circuit principle: The figure shows the circuit diagram of hardware control RS485. The circuit uses 2N7002LT1G MOS field effect transistor to invert the logic of the RS485 transmission signal output by UART_TXD_485, the MCU, and send it to the RE/DE PIN of the RS485 chip. The control principle is that when UART_TXD_485 outputs a low level, the DE of the RS485 chip is enabled; when it outputs a high level, the RE is enabled. By default, UART_TXD_485 is high level, and the RS485 chip is in the receiving state. When sending data, there are high and low level signal changes on UART_TXD_485. The low level signal is directly output through the RS485 chip SP3072EENL/TR, and the high level signal is controlled by external pull-up and pull-down resistors.

  The advantage of this method is that the control is simple, the software does not need to do extra work, and controlling RS485 is like controlling RS232. However, the disadvantage of this method is that the driving ability may be insufficient. Since this control method does not fully exert the driving ability of the RS485 driver chip itself, the output signal depends on the external pull-up and pull-down resistors. Therefore, in complex environments, such as when many loads need to be controlled, there will be a problem of insufficient driving ability. However, in some simple environments or platforms with complex software implementation, it is still feasible to use this method.

Reference address:Hardware Control RS485 Circuit Diagram Design

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