Since their first introduction in 1999, single-ended-to-differential applications of wideband fully differential amplifiers (FDAs) have often used a resistor to ground as part of the input matching circuit, at the expense of higher input-referred noise voltage. If that resistor could be removed and the input impedance matching circuit was determined solely by the path into the summing junction, it would be possible to achieve much lower input-referred noise. This is a viable approach when the input matching circuit can be maintained at very high frequencies with a common-mode loop bandwidth greater than 1GHz. This article will present the design equations for both approaches and compare the impact of input-referred noise on the target gain.
Single-ended to differential conversion using a fully differential amplifier
One of the more useful functions supported by the increasingly popular fully differential amplifiers (FDAs) is the ability to convert a single-ended source signal to the differential output signal required by all modern ADC inputs. These designs can be either DC or AC coupled. When DC coupled, the input common-mode range needs to be considered, and bipolar supplies are useful for many FDAs in this case. If higher speeds are required, single supplies are more common, and input matching circuits are often required to match certain source impedances in order to limit reflections and/or SFDR degradation. While single-supply FDAs can provide a DC coupled path, this article will present an AC coupling method that removes the input common-mode range consideration. These same results can also be applied to DC coupled designs as long as the inputs remain within a certain range. Figure 1 shows a typical AC coupled implementation of a doubly terminated 50Ω input design. This design can be further refined to an example of a target design with a gain of 5V/V, starting with a 499Ω feedback element and generating a schematic using a free Spice simulator (Reference 1).
Figure 1: AC-coupled single-ended to differential design with a gain of 5V/V (14dB) and 50Ω input impedance.
There are several common considerations for this type of circuit -
1. The feedback circuits are equal.
2. The input impedance is equal to the combination of Rt and the impedance looking into Rg1.
3. The impedance looking into Rg1 will increase to a value exceeding Rg1 through the action of the common-mode loop within the FDA (Reference 2). The effect of this loop is to keep the output common-mode voltage constant, which in turn causes the input common-mode voltage to change with the input signal, increasing the external input impedance looking into Rg1.
4. Resistor Rg2 is used to achieve differential balance and is equal to Rg1 + Rt||Rs.
5. When Rg2 is set, the noise gain (NG) of this circuit is equal to 1+Rf/Rg2.
6. Because the input path is AC coupled, the DC I/O operating voltage defaults to the internally generated Vcm reference voltage (1.2V for this 3.3V single supply device). This Vcm controls the output common-mode voltage, but because there is no DC current path back to the input, Vcm also determines the DC input common-mode operating voltage.
The specific example above uses a very low noise, 4 GHz gain bandwidth FDA-ISL55210. In this case, the design starts with selecting the value of Rf, then solving for the values of the Rt and Rg1 components. There is little vendor guidance on how to divide the input matching contribution between the Rt and Rg1 components. The trade-off is that making the Rg1 component smaller (larger Rt) will reduce input noise and extend bandwidth (for voltage feedback based FDAs). Going in this direction will depend more on the common-mode loop bandwidth and placing the input match into the Rg1 path (Reference 2). While the most common method to obtain the resistor values in the circuit of Figure 1 is an iterative or approximate method, choosing Rf for the target gain (Av) and input impedance (Rs) can be cleverly reduced to solving a quadratic equation for Rt (Reference 3).
Solving the coefficient denominator for zero gives the minimum value Rf, Rt becomes infinite and depends only on the Rg1 input path of the matching circuit. In this example, this solves for 160.71Ω.
As Rf decreases towards this Rfmin, the Rg component will increase and Rt will tend to infinity. When the gradually decreasing Rf is selected, the value of Rt can be obtained using Formula 1, and then the other two resistors are determined by the following expressions -
Noise Analysis of Single-Ended to Differential FDA
Once a set of resistor values has been determined using these design equations, these resistor values can be placed into a noise analysis circuit to obtain the total output differential spot noise. As shown in the circuit of Figure 2, all components contribute to the noise, where the noise terms are displayed as spot noise voltages and currents.
For this example where the Rf and Rg components are equal and the current noise terms are equal, the total output noise expression is very simple, as shown in Equation 5. Where NG represents the noise gain, which is equal to 1+Rf/Rg. (ISL55210 data sheet page 14)
Figure 2: Noise analysis circuit for FDA.
Any wideband FDA based on voltage feedback can use this design flow to reduce the implementation resistor values to the minimum allowed by Equation 2. Table 1 shows some minimum noise wideband gain-bandwidth product (GBP) FDAs suitable for this analysis.
Table 1: Some modern FDA components and key parameters.
By gradually reducing Rf for the design example shown in Figure 1 and recalculating the other resistor values, the input-referred noise results shown in Table 2 can be obtained. The resistor values (actual values) are the same for any of the four example devices, and the gain seen from the Rt input is 5V/V for a 50Ω input match (Reference 4). Using the output noise from Equation 5 as the input-referred gain of 5, the estimated input spot noise for each device is shown in Table 2 (which still includes the assumed 50Ω source noise embedded in the Rg element in Figure 2).
Table 2: List of resistor values and resulting noise.
Reducing the Rf design value will also reduce noise due to reduced resistor noise contribution and noise gain. The minimum value of 160.71Ω pushes Rt toward infinity, resulting in the lowest possible input noise and noise gain. The decreasing noise gain (equal to 1+Av/2 when Rt is open circuit) will also extend the bandwidth of these voltage feedback devices. One benefit of reducing these resistors is that the common-mode control loop bandwidth can be maintained above the frequency observed from Rg1 close to Rs. In the limit of Rt ->∞, the 14.3Ω Rg1 in the last row of Table 2 will be transformed by the common-mode loop to an active input impedance of 50Ω. Another consideration is the increased output stage loading due to the lower Rf value, which will increase the actual differential load and thus may degrade harmonic distortion performance. Figure 3 plots the input referred noise versus Rf from Table 2. There is obviously a significant benefit in reducing noise by reducing Rf until it is consistent with the desired input matching frequency range and loading factors. Starting with Rf = 500Ω for these design goals and working down to the minimum value of 161Ω, the total input spot noise using the lowest noise ISL55210 can be reduced from approximately 2.15nV/√Hz to 1.06nV/√Hz. Adding the noise voltage provided by the 50Ω source impedance back to the matched input (still contained within this 1.06nV/√Hz minimum) gives an input referred noise of 0.96nV/√Hz for the amplifier stage alone.
Figure 3: Input-referred noise comparison vs. target Rf value.
Remove Rt and use only active matching design
Taking the above analysis to the limit, completely removing the Rt element, then uniquely solving for the required set of resistor values. Solving for the required Rf assuming the target input impedance matches Rs and there is gain from Rg1 to the differential outputs, simplifies the design equations 6 through 8, where equation 6 is simply a repetition of the Rfmin expression from equation 2.
Then, Rg2 = Rs + Rg1 Equation 8
Substituting these expressions into the output noise calculation of Equation 5 using NG = 1 + Av/2 from this simplified design yields the noise figure (NF) expression, Equation 9 (Reference 5).
Starting with a gain of 14dB (5V/V used earlier), increasing the gain in 2dB steps for a fixed 50Ω input impedance and using the 0.85nV/√Hz and 5pA/√Hz current noise for the ISL55210 from Table 1 gives the required resistor values and resulting noise, as shown in Table 3.
Table 3: Swept gain 50Ω active matching component values and ISL55210 noise analysis.
The first row of values closely matches the earlier results in the last row of Table 2. These resistor values are correct for any voltage feedback FDA, and the output noise and noise figure are predicted using the ISL55210 input spot noise figures. Normally, increasing gain will reduce input referred noise at the expense of reduced bandwidth, as will increasing noise gain (V/V). Still using the 5V/V gain design from Figure 1, but removing the Rt component and using the values from the first row of Table 3, the simulation circuit shown in Figure 4 is obtained.
Figure 4: Active matching circuit with a gain of 5V/V and an input impedance of 50Ω using a broadband FDA.
When the noise gain = 3.5V/V in this circuit, this 4GHz gain bandwidth device will achieve >1GHz bandwidth. While the simulation here is very accurate, this circuit can also be easily tested with the ISL55210-ABEV1Z active balun evaluation board over a wide range of gains and input impedances.
Figure 5: Vout/Vin frequency response curve of the simulation circuit shown in Figure 4.
Note that this simulation has a very fine scale, showing a roll-off of <0.3dB from 1MHz to 1GHz, with the low frequency roll-off being determined by the blocking capacitor. A final check is to look at the input impedance to confirm that the common-mode feedback loop is actually transforming the 14.3Ω Rg1 into a circuit close to 50Ω. If the circuit is working properly, modifying the Figure 4 simulation circuit to have a current source input with a parallel 50Ω resistor and probing the input voltage with an AC simulation will give a result close to 25Ω. Incorporating this data into the impedance looking into Rg1 yields Figure 6. The simulated response closely matches the expected 50Ω, with higher impedance at higher frequencies as the common-mode loop bandwidth rolls off. This match is greater than 34dB reflection loss all the way to 1GHz—well above the previous FDA. This simulation closely matches the measured input impedance of this circuit (Reference 6).
Figure 6 Input impedance of Figure 4 when using current source input.
Conclusion
Wideband FDAs provide useful circuit blocks for single-ended to differential conversion circuits in high dynamic range signal processing designs. A closed loop solution with ground termination components can be used to easily evaluate the trade-offs when splitting the summing point between this component and the series resistor. Adding the Rt component reduces the other resistor values (for a fixed target input match and gain), thereby extending the bandwidth and reducing noise. Within this constraint, removing Rt and relying only on the Rg1 component and the common mode loop to set the input impedance can help any voltage feedback FDA achieve the lowest noise and widest bandwidth response. This application performs best when using an FDA with a very high bandwidth common mode loop. This approach could potentially be used to replace a single-ended I/O + balun solution for RF amplifiers with the ISL55210 in this active balun configuration. This design has many benefits over balun designs where the load and source impedances are isolated. The simple design equations provided in this article show that only four resistor values need to be changed, allowing for considerable design flexibility in input impedance and gain.
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