Design of portable power analyzer-----Frequency part circuit design (Part 2)

3.5.4 Frequency counting circuit

The counting function is implemented in FPGA. We use the gated counting method to measure the counting circuit, which consists of a gate circuit and a counting circuit. According to the measurement principle of the gated counting method:

Characteristics of time and frequency quantities

Frequency extends infinitely on the time axis, so the measurement of frequency requires a sampling time T, during which the cycles of the measured signal are counted cumulatively (if the count value is N), and the frequency value is obtained according to fx = N/T. In order to realize the digital measurement of time (here, the time interval), the measured time needs to be quantized according to the smallest possible time unit (called the time scale), which is obtained by accumulating the number of time units (counts) contained in the measured time.

Measuring principle

The signal to be counted (the measured signal in frequency measurement and the time-marked signal in time measurement) is controlled by a "gate" (main gate), and the opening (counting allowed) and closing (counting stopped) of the gate are controlled by a "gating" signal.

3.5.4.1 Gate Control Circuit

From the design analysis in the previous text, it can be seen that improving the frequency measurement accuracy should start from two aspects. In addition to setting the signal pre-division method with a variable division ratio, appropriately extending the counting time of the frequency counting module can also achieve the purpose of improving the frequency measurement accuracy. Therefore, in the design, we use these two methods to complete the frequency measurement design. Since the counting time of the frequency counting module determines the response speed of the frequency measurement, in order to ensure that the measurement response speed is not too slow, resulting in inconvenience for users and loss of real-time measurement data, the frequency measurement we use is to count the signal within the 1s gate. The frequency is the number of signals per unit time, so the count value obtained by the counter is the frequency measurement value of the signal. In addition to the ±1 error in the frequency measurement, for measuring the frequency of high-frequency signals, the accuracy of the gate signal is the key part of the frequency measurement, which directly affects the frequency measurement accuracy. Therefore, in this scheme, the gate signal is generated by high-precision crystal oscillator frequency division, and a temperature sensor is used to perform temperature calibration on the frequency measurement. The implementation of its gate control circuit in FPGA is shown in Figure 3-24. The gate control circuit mainly divides the 100MHz clock by cascading 8 decimal counters. If the clock frequency is 100MHz, then (100×10 6 /10 8)=1s, resulting in 1 second of gating.

3.5.4.2 Counting Circuit

The signal and the gate signal are ANDed. When the gate is enabled, the signal is enabled to enter the counting circuit. Since the previous pre-dividing circuit adopts a variable division ratio, a 1:256 division ratio is taken as an example here, and the gate time is 1 second, then for the highest frequency signal, the counter counts 23437500 pulses, and a 25-bit binary counter should be designed. The counted clock signal is ANDed with the count enable signal, and the count enable signal is ANDed together with the inversion signal of the NOT gate, and sent to the counter count clock input to realize the multi-cycle synchronous frequency counting method. At the same time, the falling edge of the gate signal is used to trigger the D flip-flop, so that the flip-flop output flips from low to high, as a flag signal for the completion of a count, and the flag is read to confirm the completion of a frequency measurement.

3.5.4.3 Temperature sensor

The key factor affecting the accuracy of the frequency counter is the accuracy of the gate signal. The gate signal is obtained by dividing the crystal oscillator, which is the key factor in determining the gate signal. The error of the crystal oscillator is mainly affected by temperature, resulting in the deviation of the crystal oscillator frequency. In order to obtain an accurate gate signal, a temperature sensor is added to the design to compensate for the temperature of the crystal oscillator by obtaining the current ambient temperature of the crystal oscillator.

The temperature compensation uses the Analog AD7416 temperature sensor. Its measurement temperature range is -45 to 125°C, and the accuracy can reach 0.25°C. The temperature sensor includes a sensor, a 10-bit A/D converter, and some programmable registers such as the address pointer register, temperature value register, T OTI point setting register, T HYST point setting register, and configuration register. By setting T OTI and T HYST, the maximum temperature value can be limited. Each register can be controlled by programming the address pointer register and configuration register. The sensor measures the ambient temperature. The A/D converter converts the obtained temperature value into a digital signal and stores it in the temperature value register. As shown in Table 3-3 below, the corresponding relationship between the measured temperature and the digital output, the last measured current ambient temperature can be obtained by reading the temperature value register.

3.5.4.4 Frequency counting error analysis

The main sources of system frequency measurement error are: counting error, trigger error, and standard frequency error.

The reason for the quantization error is that there is no necessary connection between the standard gate time signal and the measured signal pulse in the frequency measurement. Their time relationship is completely arbitrary, or their relative position on the time axis is random. This causes the gate opening and closing time to be out of sync with the measured signal, so that a part of the time at the start and end of the gate is not calculated, resulting in measurement errors.

Where T s——gate time;

fx——measured frequency;

ΔN is the maximum counting error.

However, no matter what the count value N is, its maximum counting error does not exceed ±1 counting unit.

The trigger error is due to the fact that the input signal must be amplified and shaped by the channel circuit to obtain a pulse signal, that is, the input signal is converted into a pulse signal. This conversion requires only the signal amplitude and waveform to be changed, and its frequency cannot be changed. However, if the input measured signal is superimposed with an interference signal, the frequency (period) of the signal and the trigger point relative to the gate signal may change. The resulting measurement error is called "trigger error", also known as "conversion error". This error has little impact in actual design.

The standard frequency error is because the quantization error during frequency measurement is the relative error of the gate opening time ΔT s /T s, which is determined by factors such as the frequency stability, accuracy, frequency division circuit, gate switching speed, and stability of the crystal oscillator. When designing a counter, try to minimize and eliminate the influence of shaping, frequency division circuit, and gate switching speed. The frequency of the quartz oscillator is fc, and the frequency division coefficient is k, then

In summary, we can wait until:

The errors of frequency measurement by counters mainly include: counting error and standard frequency error. Generally, the total error can be synthesized by the absolute value of the sub-item errors, that is:

In the actual design, we use the multi-cycle synchronous frequency measurement method to reduce the quantization error to a great extent. By selecting a high-performance and highly integrated pre-divider, simplifying the frequency measurement circuit design, and adding appropriate filtering design to the frequency measurement channel, the impact of the trigger error is reduced. The main error of the system is converted into a standard frequency error caused by the external crystal oscillator that generates the FPGA working clock. By selecting a higher-precision and more stable crystal oscillator, the accuracy and stability of the system frequency measurement can be improved. Minimize the error of frequency measurement as much as possible.

3.6 Power supply design

Power supply is an integral part of electronic products. In order to make the circuit performance stable, a stable power supply is often required. Since portable electronic products are independent devices that can work outside the indoor environment, the equipment must have its own independent power supply device, which is generally powered by batteries. How to make the performance of the voltage-stabilized power supply meet the requirements of the circuit, save power (can extend the battery life), have good safety, occupy a small space, and be light in weight is an important task in designing portable electronic products. Due to the rapid development of various portable electronic products, various semiconductor device manufacturers have developed various new power ICs suitable for the requirements of portable electronic products, and provided various typical application circuits, making the power supply design work simpler, that is, the power supply design work is to select the appropriate power IC according to the requirements of the product.

Therefore, for this project, we designed a battery-powered circuit, and still provided an indoor power supply mode that directly powers the instrument through a DC adapter. In the selection of power IC chips, we mainly considered the following criteria:

The operating voltage and current are relatively small, and the power consumption is low;

Small package size; almost all chips used in the power supply part are SMD type to reduce the space occupied;

The output voltage has high accuracy, high efficiency, and small output ripple and noise voltage.

The output voltage accuracy of the selected TPS7350, MAX755 and other devices involved in the transformer output part is about ±2%, which can meet the working needs of the internal chips of the system. At the same time, in the design, considering the power supply voltage required by various chips in the channel, and to avoid the possible mutual interference between ARM and ARM reset chip and FPGA and other chips in the channel sharing the same digital 3.3V, we use the power chip to transform the output voltage of the battery into analog ±5V, digital 5V, digital 3.3V (provided to ARM for separate use), digital 3.3V (provided to FPGA and other chips for digital level use), and digital 1.5V.

The specific structure of the power supply is shown in Figure 3-25. The CD4013 dual D trigger is used to provide power control for the power analyzer. The power control is divided into hardware power on and off and software power off. The trigger output controls the relay to select the battery power supply or the DC adapter power supply. The working status of the power supply will be monitored by the ARM program, and the user can understand the power supply status and battery power status through the display screen.