The problem of being unable to sample data when using the 28335 ADC module to sample current

Jacktang

The problem of being unable to sample data when using the 28335 ADC module to sample current [Copy link]

1. Debugging description:
Use the ADC module of DSP238335 to sample current, use the EPWM module to trigger ADC sampling, ADC sampling cascade mode, and EPWM uses up-down mode.
To realize the function, you need to understand the basic working principles of EPWM and ADC, the settings of related registers, which trigger mode to use, the sampling method of ADC, etc. This time, we will mainly record the ideas and process of solving the problem.
Problem: Use ADC interrupt to read the sampled data and perform data conversion calculation. When performing simulation debugging, the ADC sampling does not sample the value.

2. Debugging ideas and process:
1. The first step is to check whether the ADC interrupt is generated. For the three-level interrupt of DSP, check all the flag bits related to the ADC interrupt (as shown below). ADC is INT1.6. Use simulation debugging to check whether the corresponding PIEIFR, PIEIER, IER, IFR and other flag bits are correct. After checking, there is no abnormality in the interrupt flag bit, and the ADC can be interrupted normally. It is suspected that the ADC module does not convert data normally;

2. Since the sampling is triggered by EPWMxSOCA, the second step is to check whether the trigger source (red line in the figure below) is normal. The way EPWM generates trigger events is shown in the red box in the figure below. A trigger event is generated when CTR= CMPA. Check that the trigger source ETFLG.SOCA=0 of the EPWM module triggering the ADC; it is shown that no SOCA trigger event is generated, so AD sampling cannot be performed;

3. The third step is to check the register settings of the trigger source part of the ADC initialization. The simulation debugging shows that the value of TBCTR has not changed and has always been 0. After CMPA=0, a trigger event is found. It can be seen that the time base (TB) module is not working, making the TBCTR time base count register unable to work (count). The main suspicion is that the TB module is working, as shown in the red circle in the figure below.

4. The time base module requires a clock signal to work. After inspection, the time base clock (red circle 1) obtained by dividing the system clock has been set, and there is no problem here;
5. Check whether the TBCLK time base clock is enabled and whether the EPWM module clock is enabled (as shown in the figure below). After inspection, it was found that the TBCLK time base clock and the EPWM1 module clock used were not enabled. After setting 1 to enable in the program (DSP2833x_SysCtrl.c), the ADC can sample normally.

SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1; // ePWM1
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Enable TBCLK within the ePWM

TBCLKSYNC enable in PCLKCR0 register:

EPWM1 enable in PCLKCR1 register:

Written at the end
The clock setting is set by TI's official .DSP2833x_SysCtrl.c and is generally not changed. I turned it off when checking other module problems and did not turn it on when I used it later, which caused this situation. Although the problem was solved later, it wasted a lot of time. I must be more careful in the future.

toothache

Great post! Great article!

Learned it!