introduction
As society and economy evolve from paper-based to digital information management, data centers for data processing, storage, and networking play an important role in many fields such as personal business, academic and government systems. However, at the same time, the power supply and cooling costs of data centers are also rising. For modern data and telecommunications power systems, higher system efficiency and power density have become the core focus, because small and efficient power systems mean saving space and electricity bills.
From a topology perspective, synchronous rectifiers are the basic building blocks of the secondary side of switch-mode power supplies, as they offer lower conduction and switching losses, improving the efficiency of these conversion stages. They are very popular in low-voltage and high-current applications such as server power supplies or telecom rectifiers. As shown in Figure 1, they replace Schottky rectifiers, resulting in a much smaller voltage drop. From a device perspective, the past decade has seen tremendous advances in power MOSFET transistors, enabling novel topologies and high-power density power supplies. After the advent of planar technology in the early 20th century, low- and medium-voltage MOSFETs were quickly developed, using trench gate technology to significantly improve performance. Trench gate MOSFETs are the power device of choice for low- and medium-voltage power applications, where a gate structure is embedded in a trench region that is carefully etched into the device structure. This new technology allows for higher trench density and eliminates the need for JFET impedance elements, thereby reducing the characteristic on-resistance by about 30%. When the product of the on-resistance of the MOSFET and the drain current is less than the diode forward voltage drop, the energy loss of synchronous rectification is reduced.
However, low on-resistance is not the only requirement for power switches in synchronous rectification. To reduce driving losses, the gate charge of these devices should also be small. The reverse recovery characteristics of the soft body diode help to weaken the peak of the voltage spike, thereby reducing the snubber circuit losses. In addition, there are switching losses caused by the output charge QOSS and the reverse recovery charge Qrr. Therefore, the key parameters of medium and low voltage MOSFETs, such as RDS(ON), QG, QOSS, Qrr and reverse recovery characteristics, directly affect the efficiency of the synchronous rectification system. The new medium voltage power MOSFET, called PowerTrench MOSFET, is highly optimized for synchronous rectification and can provide higher efficiency and power density for server power supplies or telecom rectifiers.
Power MOSFETs optimized for synchronous rectification
In switch-mode power supplies, RDS(ON)×QG FOM (quality factor) is generally regarded as the only important indicator for measuring MOSFET performance. Therefore, several new technologies have been developed to improve RDS(ON)×QG FOM. Although MOSFET technology and cell structure have undergone tremendous innovations over the years, MOSFET vertical cell structures can still be roughly divided into three categories: planar, trench and lateral. Among these three types of structures, trench gate MOSFET has become the mainstream of high-performance discrete power MOSFETs with BVDSS<200V. This is mainly because this device not only has a particularly low characteristic on-resistance, but also can achieve excellent RDS(ON)×QG quality factor (FOM) within the BVDSS range.
Trench gate structures can significantly reduce the channel impedance (Rchannel) and JFET impedance (RJFET), which is the main cause of on-resistance for low-voltage MOSFETs (BVDSS<200V). The trench structure can provide the shortest drain-source current path (vertical), thereby reducing RDS(ON), which can be used to increase cell density without any JFET pinch-off effect. The percentage of relevant impedance in each area varies greatly, depending on the specific design and BVDSS. Although reducing conduction losses requires reducing RDS(ON), a higher FOM must be considered to balance the trench depth and width of the existing optimized structure. There are often some variant designs of standard trench cells that aim to maintain low impedance while improving FOM. The traditional trench gate structure shown in Figure 2 achieves lower on-resistance by increasing the width/length ratio of the trench. In order to improve switching performance and increase the CGS/CGD ratio, the industry has developed a technology to grow a thick oxide layer at the bottom of the trench, as shown in Figure 3.
This approach not only helps reduce the gate-drain capacitance CGD, but also improves the drift region impedance. In addition, it also helps to reduce the on-resistance and gate charge, because now you can get lower Vth and on-resistance through a thin gate oxide layer, while using a thick oxide layer at the bottom of the trench to get the lowest CGD. Another technology is to use a charge balance or super junction device structure. It was originally developed for high-voltage devices and can now be used for low-voltage devices. Using the charge balance scheme, two-dimensional charge coupling can be obtained in the drift region, so that higher doping concentrations can be used in the drift region, ultimately reducing the drift impedance. Compared with the previous generation technology, this new medium-voltage power MOSFET not only has a significant improvement in characteristic impedance, but also its already excellent switching characteristics have been further improved.
In addition to RDS(ON) and QG, other parameters in the synchronous rectification structure, such as body diode reverse recovery, internal gate resistance, and output charge (QOSS) of the MOSFET, are now becoming more relevant. The importance of these loss components becomes more apparent at higher switching frequencies and output currents. Fairchild Semiconductor's medium voltage MOSFET products are now optimized for diode reverse recovery and minimization of output capacitance.
Power consumption of synchronous rectification
The main power losses in a power switch are conduction losses and switching losses. There are also capacitive losses due to the output capacitor, off-state losses due to leakage current, reverse recovery losses, and drive losses. In high-voltage, high-power applications, these losses are often ignored; however, for multi-watt applications, it is well known that capacitive losses can be as high as 50% or more of the total power consumption. It is important to note that a defective device with excessive leakage current can cause thermal runaway failure, especially at high ambient temperatures, which is a common occurrence. In low-voltage applications, drive losses can account for a large portion of the total power consumption because the conduction losses of low-voltage switches are very small compared to high-voltage switches. Under light load conditions, conduction losses are minimal and drive losses become more important. With the introduction of new efficiency specifications such as the Climate Savers Computing Initiative, drive losses have become a key factor in light-load efficiency. Drive losses can be calculated using the following equation.
The switching frequency and gate drive voltage are design parameters, while the gate charge value is provided by the data sheet. One difference between synchronous rectification and diode rectifiers is that the MOSFET is a bidirectional device. Figure 5 shows the current flowing through the MOSFET trench from source to drain during conduction and the current flowing through the body diode during the dead time in general. Since the body diode conducts before the gate conducts in synchronous rectification, the synchronous switch can use zero voltage switching technology. Since the soft switch in synchronous rectification works at the switch turn-on and turn-off instants, dVds/vt is zero. Therefore, the capacitive current of CGD (due to dVds/dt) is also zero.
Given this order, the gate charge value in Equation 1 should be chosen carefully. Since there is no voltage across the synchronous switch at the turn-on instant, the “Miller effect” does not occur at this time. Therefore, the gate charge value obtained is approximately equal to the total gate charge QG minus the gate-drain portion of the gate charge QGD. However, this is still an optimistic estimate of the drive losses. In practice, the gate charge value of the synchronous switch is not equal to the simple QG-QGD estimate. This is because in synchronous rectification, there is a negative bias between the drain and source, while QG and QGD in the data sheet are measured using a positive bias. Moreover, the QSYNC curve below Vth is similar to the slope above Vth because the drain-source voltage in these two regions during zero voltage switching in synchronous rectification is zero. The gate charge QSYNC of synchronous rectification can be measured using the simple circuit shown in Figure 6 and applying appropriate drive signals to Q1 and Q2.
With the known resistor value, QSYNC can be obtained by the following formula, which can more accurately estimate the gate drive power consumption. In synchronous rectification, QSYNC is small and the performance of the device is better. As shown in Figure 7, there is no flat area on the gate-source voltage of the synchronous rectifier power MOSFET.
In synchronous rectification, CGS (Ciss-Crss) is a more critical factor to reduce QSYNC. As shown in Figure 8, due to design optimization, the CGS of the 3.6 milliohm PowerTrench MOSFET is greatly reduced compared to the 4.5 milliohm competitive products. As shown in Table 1, the QSYNC of the 3.6 milliohm PowerTrench MOSFET is reduced by 22% and 59% compared to the 4.5 milliohm and 3.0 milliohm competitive devices, respectively. Figure 9 calculates and compares the ratio of drive loss to conduction loss for a 27V synchronous rectification stage with a gate drive voltage of 10V and a switching frequency of 100kHz. There are two synchronous switches here, and under 10% load conditions, the drive loss of the 3.0 milliohm competitive product is twice the conduction loss.
The diode reverse recovery time (Trr) and reverse recovery charge (Qrr) specified on the data sheet are generally used to calculate the forward switching losses. When using the Qrr value on the data sheet to calculate the losses, it is important to note that the body diode reverse recovery current is a function of many parameters, such as forward current IF, reverse recovery diF/dt, DC bus voltage, and junction temperature Tj. An increase in any of these parameters will lead to an increase in Qrr. The conditions on the data sheet are usually lower than the typical converter operating conditions. Since the switching converter needs to switch the power MOSFET as fast as possible, the edge rate, such as diF/dt, can be as much as 10 times faster than the data sheet conditions, greatly increasing the Qrr of the synchronous rectification.
The output charge Qoss and the reverse recovery charge Qrr also cause losses when the switch is turned off. Therefore, the power consumption caused by Coss and Qrr can be calculated by the following formula.
Voltage spikes on switches
The general principle to minimize harmful voltage spikes is to use short and thick boards and minimum current loops. However, this is not easy to achieve due to size and cost constraints. Sometimes, designers have to consider mechanical issues such as heat sinks and fans; sometimes, cost constraints force the use of single-sided printed circuit boards. Snubber circuits can be a viable alternative to manage voltage spikes within the maximum rated drain-source voltage range. In this case, additional power dissipation is inevitable. In addition, the power dissipation generated by the snubber circuit itself at light loads cannot be ignored. In addition to board parameters, device characteristics also affect the voltage spike level. In synchronous rectification, a major device-related parameter is the body diode softness during reverse recovery. Basically, the reverse recovery characteristics of the diode are determined by design. There are several control inputs that affect the reverse recovery, such as junction temperature, di/dt, and forward current level. However, when the conditions are fixed, the diode always exhibits the same behavior. Therefore, the evaluation results of the device are very useful to evaluate the operation of the system. Figure 10 shows the reverse recovery waveforms of two different devices (but with very similar ratings).
In the reverse recovery current waveform, the time from zero to peak reverse current is called ta. tb is defined as the time from peak to zero. The softness factor is defined as tb/ta. A soft device has a softness factor greater than 1, while when its softness factor is less than 1, the device is considered "snappy". As can be seen in Figure 10, the peak voltage of the snappy diode during reverse recovery is larger. When all conditions are the same, the voltage spike of the snappy diode is always higher, thus causing additional losses in the snubber circuit. Under light load conditions, this may be more important than reducing the on-resistance RDS(on) by 1 milliohm. Figure 11 shows the operating waveforms of a soft device and a snappy device in a 500W PSFB DC-DC converter with a resonant frequency of 400kHz. The peak voltage of the soft device is 10% smaller than that of the snappy device, which can reduce the power consumption of the snubber circuit by 30% and improve the system efficiency by 0.5%. Although the soft device has a 25% higher RDS(on) than the snappy device, the efficiencies are 94.81% and 94.29% respectively at 20% load. The efficiencies of both devices are the same at full load.
Summarize
To create a more efficient power switch for synchronous rectification, low RDS(on) is not the only requirement. As the importance of light load efficiency increases, gate drive losses and snubber circuit losses become very important loss factors. Therefore, low QSYNC and soft diodes become crucial characteristics to achieve higher synchronous rectification efficiency. However, RDS(ON) is still a key parameter for the application. Figure 12 shows the relative power dissipation of different components at different loads and different device conditions in an 800W PSFB with synchronous rectification. Due to lower driver losses and output capacitive losses at 10% load, the total power dissipation of the 3.6mOhm PowerTrench MOSFET is 43% lower than that of the 3.0mOhm competitor. In addition, the power dissipation of the 3.6mOhm PowerTrench MOSFET is mainly due to conduction losses at full load, so it loses less power than the 4.7mOhm competitor. From the loss analysis summarized in Figure 12, it is obvious that the power dissipation of the 3.6mOhm PowerTrench MOSFET can be greatly reduced at both full load and light load conditions due to the design optimization.
Fairchild Semiconductor has introduced a new family of PowerTrench power MOSFETs. These devices combine smaller QSYNCH and soft reverse recovery inherent body diode performance with fast switching to achieve higher efficiency in rectification applications. Switching efficiency is improved and drive and output capacitive losses are reduced due to reduced gate charge and output capacitor stored energy. These benefits of PowerTrench MOSFETs can help designers significantly improve system efficiency.
Figure 1 Diode rectification and synchronous rectification
Figure 2 Conventional trench gate MOSFET
Figure 3 Trench MOSFET with thick oxide layer at the bottom
Figure 4 Trench MOSFET with added shield electrode
Figure 5 Waveforms of power MOSFET in synchronous rectification
Figure 6 QSYNC measurement
Figure 8. Comparison of 100V gate-source capacitance/3.6 milliohm PowerTrench MOSFET and competing products
Figure 9 Comparison of loss ratio (driving loss/conduction loss) under different output load conditions
Table 1: Comparison of key specifications of DUTs
Figure 10 Reverse recovery waveforms with different softness factors
Figure 11 Peak drain-source voltage of power MOSFET in 500W PSFB DC-DC converter, soft device (left), snappy device (right)Another advantage of soft body diode is that it enables the use of devices with lower breakdown voltage ratings. It also reduces conduction losses because the on-resistance per unit area is proportional to the breakdown voltage.
Figure 12 Loss analysis of 800W synchronous rectification circuit
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