"POP" noise in audio system applications and its common solutions

　　"POP" noise refers to the popping sound caused by transient impacts caused by various operations when audio devices are powered on, powered off, and after power is stable. This article will discuss several common solutions and their working principles. These methods have their own characteristics for specific integrated circuits and need to be comprehensively considered according to actual conditions when applied.

Figure 1: Schematic diagram of single-ended mode and bridge mode output circuit.

　　The audio system mentioned in this article refers to audio semiconductor devices, including audio digital-to-analog converters, analog-to-digital converters, audio amplifiers and other application systems. The transient impact that generates "POP" noise is usually a very narrow sharp pulse. After being expanded using Fourier analysis, its spectral components are very rich, and the energy distribution in the frequency domain is relatively even. The purpose of the several "POP" noise solutions discussed below in this article is to reduce the harmonic components in the range of 20Hz~20kHz. For most people, if the peak-to-peak voltage of the signal is less than 10mV, it is no longer audible.

Bridge-type (BTL) output and single-ended (SE) output

Figure 2: Bridge mode and single-ended mode output “POP” noise.

　　The bridge output has many advantages over the single-ended output. For example, the bridge output can output a higher voltage VOBTL=2*VOSE under the same power supply voltage Vdd, and output greater power under the same load conditions. Figure 1 is a schematic diagram of the two output circuits.

　　It should be pointed out that the bridge mode can effectively suppress common-mode noise. When the output power is the same, the noise of the bridge mode is significantly smaller than that of the single-ended mode (as shown in Figure 2, the blue channel is connected to the load, and the green channel is connected to the power supply Vdd). This is because the same impact will appear at the "+" and "-" ends of the bridge output structure at the same time, and cancel each other after passing through the load, and will not do work on the speaker, so there will be no "POP" sound. This structure has a good suppression effect on power-on, power-off noise and operation noise.

Figure 3: Two circuit forms of bridge structure.

　　There are two common bridge structures, and they have slightly different abilities to suppress "POP" sounds. The circuit on the left of Figure 3 is a parallel connection of two amplifier units. The same input signal enters the "+" and "-" input terminals of the two amplifier units AMP1 and AMP2 respectively, and their amplification factors are kept the same and the phases are kept opposite (180 degrees apart). Here, the gain of the AMP1 unit network GAINUP = -R9/R8 = -2, and the gain of the AMP2 unit network GAINDOWN = 1 + R11/R12 = 2. The accuracy error of a single resistor is usually ±30%, but within the same chip, this deviation is in the same direction. If the design is appropriate, the accuracy of the resistor ratio can be guaranteed to be within ±1%. The DC parameters of AMP1 and AMP2 also deviate in the same direction, so the common-mode signal can be well offset at the "+" and "-" output terminals.

Figure 4: OCL output structure.

　　The circuit on the right side of Figure 3 adopts a cascade form. The output signal of the previous stage enters the "-" input terminal of the next stage, and the gain of the AMP4 unit network GAINBACK = -R14/R13 = -1. In fact, the output of AMP3 will have a certain delay after being reversed by AMP4, and cannot be completely offset at the "+" and "-" output terminals. The tributary error signal such as the offset voltage of AMP3 will be copied in AMP4 and sent to the "+" terminal together with the offset voltage of AMP4, and cannot be completely offset with the "-" terminal. Therefore, the effect of this structure in suppressing the "POP" sound is slightly worse, and it is usually used in low-power devices.

　　In addition, there is another structure that can effectively suppress common-mode noise, that is, the output coupling capacitor-free (OCL) structure (see Figure 4). This structure is very similar to the bridge structure. The DC common-mode voltage is offset at the output end, and only the AC signal works on the load. Like the bridge structure, the OCL structure can bring another benefit to the audio system because the coupling capacitor is omitted, that is, the frequency response of the system can be extended to a very low range, which will be described in detail later.

Increase the filter capacitor of VBIAS

Figure 5: Simulated waveforms of “POP” noise and Vbias voltage for single-ended mode circuit.

　　Audio integrated circuits usually have a pin called Vbias, or Vref, Vmid, Vsvr, bypass, etc. It is an internal DC reference voltage. If the internal circuit is to work, this bias voltage must be established. In actual applications, this pin is usually connected to a bypass electrolytic capacitor to the ground, which plays the role of filtering noise. For a single-power supply system using a positive voltage, when the system is working stably, the reference voltage value is approximately equal to Vdd/2. Increasing the capacitance of this capacitor can suppress "POP" noise. When the chip is powered on or switched from standby to working state, the DC bias voltage begins to build up, gradually increasing from 0, and charging the Vbias filter capacitor. After a certain period of time, the voltage rises to Vdd/2, at which time the chip can work, and the output audio signal swings up and down based on this DC voltage. Similarly, when the chip is powered off or enters standby state, the filter capacitor discharges and the bias voltage begins to drop, from Vdd/2 to 0. Experiments have shown that the "POP" sound when the chip is powered on and off is caused by the instantaneous jump of the bias voltage.


　　Figure 5 is the simulation result. The red line represents the Vbias voltage and the blue line represents the load output in single-ended mode (after the coupling capacitor, as shown in the circuit on the left of Figure 1, Co = 220uF, RL = 16Ω). If Vbias jumps slowly, the "POP" impact will be reduced (as shown in Figure 6). At this time, the impact pulse becomes wider, the amplitude decreases, and the "POP" sound becomes smaller. Slowing down the rise and fall of Vbias can increase the jump delay of the reference voltage. Assuming that the charge and discharge current of the filter capacitor is a constant, this process can be simplified into a first-order RC model. According to formula (1), the time required for the voltage to rise from 0 to Vbias/2, or to fall from Vbias/2 to 0 can be calculated.

tdalay = 0.69*R*C (1)

Figure 6: Simulated waveform of “POP” noise after Vbias jump slows down.

　　Therefore, increasing the filter capacitance of Vbias can slow down the rise and fall speed of the DC reference voltage and play a role in reducing "POP" noise. Figure 7 shows the effect of slowing down the reference voltage jump after increasing the capacitance, where the red line represents the power supply voltage Vdd and the blue line represents the Vbias voltage (assuming Vdd = 5.0V, Vbias = 2.5V).

　　Some audio chips integrate a fixed delay circuit unit. After power-on, it takes a fixed delay before Vbias starts to slowly rise to a stable state. At this time, the rising delay time from low voltage to high voltage is tpLH. When the chip is powered off, the implementation method of the integrated circuit makes it difficult to delay for a period of time before starting to fall, but the falling delay time tpHL from high voltage to low voltage can still be increased to achieve a better suppression effect. At this time, it is only necessary to make the equivalent resistance during discharge greater than the equivalent resistance during charging. Figure 8 shows the Vbias change timing of MAX9890.

Figure 7: “POP” impact waveform with different coupling capacitances.

tpLH＝0.69*Rcharge*CBIAS (2)
tpHL＝0.69*Rdischarge*CBIAS (3)

　　It should be noted that if the filter capacitor is too large, the chip's settling time will be longer, making people feel that the sound is not output for a long time. In addition, too large a capacitor will also deteriorate the important indicator of the audio system - total harmonic distortion + noise (THD+N). The detailed reasons are not explained here. Please refer to the corresponding data sheet and make a compromise when selecting the value.

Reduce the coupling capacitance at the output end

　　For a single-ended output structure, a capacitor is usually required in a single-power system (as shown in Figure 1). The function of this capacitor is: (1) to isolate the DC reference voltage Vbias. If there is no DC isolation, the DC voltage will directly flow through the speaker coil behind, causing the paper cone balance position to deviate to one end. If Vbias is too large, it may also damage the coil. (2) Couple the AC audio signal. It and the speaker load form a first-order high-pass filter (HPF). According to formula (4), the size of the capacitor is related to the cutoff frequency fc at the low frequency.

fc＝1/(2π*RL*Co) (4)

Figure 8: MAX9890 Vbias change timing.

　　The larger the capacitance Co, the lower the cutoff frequency fc, which means that lower frequencies can also be coupled to the load (see Figure 9).

　　Reducing the capacitance of Co can reduce the amplitude of the "POP" impact and narrow the pulse width. Since the spectrum energy of the "POP" impact is mostly at high frequencies, reducing the capacitance of Co can also reduce audible noise. Figure 10 shows the "POP" impact when the capacitance Co is 10uF, 47uF, 100uF, and 220uF respectively. It can be seen that when Co is reduced to a certain value, the noise suppression effect is improved very little when the value is reduced. However, according to formula (4), reducing the capacitance value can significantly increase the cutoff frequency fc (as shown in Figure 9), so the design engineer must weigh and make a compromise.

　　Of course, some chips have bass enhancement characteristics, which can make the gain of the low-frequency part greater than the gain in the passband by adding a zero point in the external feedback loop. For example, for the LM4838 device, adjusting the size of the capacitor Cbs can adjust the position of the gain inflection point in frequency (see Figure 11).

Use appropriate operations to suppress "POP" noise

Figure 9: Frequency response characteristics under different coupling capacitances (RL = 16Ω).

　　There are often MUTE and STB (Standby) pins on audio power amplifier chips. When the MUTE signal is valid, the chip will short the input terminal to the ground, and other circuits will keep working normally; when the STB signal is valid, the Vbias bias circuit, which consumes the most power when the audio circuit is static, will be turned off. For audio circuits using CMOS technology, the static current after turning off the Vbias bias circuit is mainly the subthreshold current of the MOS tube, that is, the leakage current of the MOS tube (microampere level). The smaller the threshold voltage of the tube, the greater the current value. From the above discussion, it can be seen that if STB is used alone, it is inevitable to cause "POP" noise due to the transient change of Vbias. If these two pins are used correctly in a certain order, the switching noise can be effectively suppressed (see Figure 12). When the chip is powered on, MUTE and STB are enabled first. After the power supply is stable, STB is released first, and then MUTE is released. When the power is off, MUTE is enabled before preparing to power off, and then STB is enabled until Vdd becomes 0. This is because the "POP" noise caused by MUTE operation is usually smaller than the "POP" noise caused by STB operation.

Figure 10: “POP” impact waveform with different coupling capacitances.

　　Figure 12 may easily lead to such a misunderstanding: the operation of STB is completely covered by the effect of MUTE. Can noise be suppressed without STB? The answer is yes. No matter what the state of STB is, if only MUTE is used and the sequence of Figure 12 is followed, the "POP" sound can indeed be suppressed. However, it should be noted that during the power-on process of the chip (from 0 to Vdd), the power supply only needs to reach a certain voltage value less than Vdd, and Vbias will jump from 0 to Vdd/2. At this time, the power supply is not stable yet, and Vdd will generate an unpredictable random impact noise to the load through the output driver. If Vbias has not been established at this time (still 0V), the impact of the random impact noise is very small. At least the operation of Figure 12 can suppress the "POP" noise caused by the transient impact of the power supply. After the power supply is stable, the impact caused by Vbias is only caused by the power jump from 0 to Vdd/2 (not from 0 to Vdd). But the actual situation is more complicated. The DC reference of the input end and the DC reference of the output end of some chips are two independent voltages. When STB is valid, the Vbias of the output end does not jump. Some chips short the output end to the ground when MUTE is valid. Even if MUTE is valid, it only grounds the input end, and the Vbias impact of the output end will still be transmitted to the load through the coupling capacitor Co. No matter what the situation is, from the perspective of suppressing noise, design engineers always hope that the Vbias of the output end changes slowly, preferably unchanged and always 0V.

Use an external mute (MUTE) circuit

Figure 11: LM4838 bass enhancement characteristics, (a) typical application schematic; (b) frequency response for different Cbs values.

　　From the above discussion, it can be seen that the "POP" noise that occurs when the chip is powered on or off is difficult to solve. In fact, this is true. Without Vdd, the entire system may lose power at the same time, the MCU cannot work, the I/O state is out of control, and the operation shown in Figure 12 cannot be completed. However, there are still some ways to solve this problem, such as using an external mute circuit. At this time, the idea of ​​"reducing the 'POP' sound is to avoid DC transients" mentioned above is still applicable. Therefore, this mute circuit should have the following functions: (1) When powered on, before Vdd starts to rise, output a stable and valid signal (assuming a high level) to drive the MUTE and STB pins; (2) When powered off, before Vdd starts to drop, output a stable and valid signal (assuming a high level) to drive the MUTE and STB pins.

　　The circuit shown in Figure 13 can basically meet the above two requirements. When +12V is powered on, the charge reaches the e-pole of Q1 through D1 and also reaches the b-pole of Q1 through R1 and R2. Since the charge needs to charge C2, the b pole of Q1 is lower than the e pole by a threshold voltage in the initial period of trise when power is turned on. At this time, Q1 is turned on and outputs a high-level signal MUTE_OUT1 at the c pole for a period of time. Figure 14 shows the simulation results of the external mute circuit.

Figure 12: Correct timing of MUTE and STB during power-on and power-off.

　　When +12V suddenly loses power, C2 discharges quickly through D2. At this time, D2 conducts forward, short-circuits R1 and forms a discharge loop. Because C2 has a small capacitance and stores less charge, the discharge time constant is ttailrise. The charge stored in C1 cannot be released through D1, so a voltage difference appears between the e and b poles of Q1, causing Q1 to turn on and output a high level again. Once the power supply is stable, the voltage of the b pole of Q1 is slightly higher than the e pole, then Q1 is cut off and MUTE_OUT1 is in a high impedance state. In

　　actual application systems, there are generally multiple groups of power supplies at the same time. Due to different voltages, different loads, and different decoupling capacitors connected in parallel, the rise and fall time of each group of power supplies will be different. This realistic difference is the working premise of the circuit in Figure 13: put the power supply with short power-on and power-off time at +12V, and use the power supply with relatively slow rise as the audio Vdd. This point needs to be emphasized.

　　The parameter optimization method of the circuit in Figure 13 is introduced below. Figure 15 shows the voltage changes at points A, B, and C in the external mute circuit. There is a common device C2 in the power-on and power-off circuits. The value of C2 should be appropriate to achieve ttailrise. The difference between the two times can be increased by increasing the resistor R1 in the charging circuit and reducing the forward resistance of the diode D2 in the discharge circuit. The diode is a semiconductor device, and its forward resistance is nonlinear, and the resistance value is related to the forward current flowing through it.

Figure 13: External mute circuit.

RFOR＝Φr/(IFOR＋IS) (5)

　　Where, Φr＝kT/q＝26mV@T＝300K, which is a voltage constant related to temperature; IS is the saturation current, which is a constant related to the junction area. From formula (5), it can be seen that the forward resistance decreases with the increase of the forward current. Here, the higher voltage +12V in the system is used as the power supply of the mute circuit to increase the discharge current of the diode D1. During the charging process of C2, there are two currents charging it, one of which comes from +12V and passes through R1, and its rise time (from 10% to 90%) is:

trise＝2.2*Rcharge*C (6)

　　Substituting R1 and C2 into formula (6), the rise time is calculated to be 10.34 seconds. But the actual rise time is not that long, because there is another charging current from the b pole of Q1. When Q1 is turned on, the voltage at point B is equal to the voltage at point A minus the emitter junction voltage drop, which is approximately 10.6V. The collector junction is also forward biased and the tube is in a saturated state. Therefore, the current flowing out of the b pole of Q1 charges C2 through R2, accelerating the rise of the voltage at point C.

Figure 14: Simulation waveform of external mute circuit

　　After the +12V voltage stabilizes, the voltage difference between Q1's e and b decreases, the tube is gradually cut off, MUTE_OUT1 output is in high impedance state, and the collector is open. When the system suddenly loses power, the voltage at point C suddenly drops to 0.7V (the voltage drop of D2), and a voltage difference appears between the e and b terminals, causing Q1 to turn on and the c pole to output a useful high-level signal. At this time, the charge stored in C1 can only be released through Q1, R2, and D2. In order to prolong this discharge process, the resistance value of R2 can be appropriately increased, but too large a resistance value will reduce the current at the b pole and make the tube's driving ability worse.

　　When the system is working normally, the switch of the MUTE signal can use the MCU I/O port as a normal logic signal. In order to enhance the driving ability, the signal of this port is often inverted by a PNP transistor and output MUTE_OUT2 (see Figure 16). In this way, when MUTE0 is low, the inverted high-level MUTE_OUT2 comes from the voltage divider of two resistors, namely R5 and the saturation resistor Rbe of Q2's e and c poles. Since Rbe<

Figure 15: Voltage changes at points A, B, and C in the mute circuit

　　In addition, MUTE0 from the MCU is low-level valid. During the process of MCU powering on and off, the level of I/O is unknown. If the tool is used for simulation, the port is in an uncertain state (logical value is "X") before the reset is completed. In fact, there is no "X" value in the actual circuit, but only "1" and "0". Fortunately, in some 51 series MCUs that the author has used, the I/O port always outputs a stable "L" level during this so-called "out of control" time.

　　MUTE_OUT2 forms an "OR" logical relationship with the above-mentioned MUTE_OUT1, and acts on the MUTE pin together. For audio amplifiers with low output power, an NPN transistor is often used to form a switch between the output terminal and the ground. When it is estimated that "POP" noise may appear, the switch is closed, and when output is required, the switch is opened (as shown in Figure 17).

Figure 17: Two MUTEs form an "AND" logical relationship.

Figure 16: Using an MCU I/O port as a second MUTE signal.

　　Here I would like to emphasize only one point: to reduce the resistance between c and e when Q3 is closed, more current should be input from the b pole to increase its saturation depth, and the appropriate resistance value of R7 should be selected. Since the c pole of Q3 is connected after the coupling capacitor, the left and right channel outputs (OUT_L/OUT_R) can be negative. Therefore, in order to ensure that Q3 is reliably cut off during normal operation, the other end of R6 can be considered to be connected to a lower negative level, and a larger resistance value should be used to avoid affecting the saturation effect of Q3. If the output power is large, a physically isolated relay can be considered to replace Q3.

　　Although the above mentioned 5 methods to solve "POP" noise, they are not isolated. For the problems encountered in practical applications, it is necessary to find the main cause of the "POP" sound, and also to consider comprehensively and choose the most targeted and economical solution.

Author: Wang Yu System Engineer BCD Semiconductor Manufacturing Co., Ltd.

Figure 17: Two MUTEs form an "AND" logical relationship.