1 Voltage regulator (regulator)
The 7.42V reference voltage output from the VREF pin is used as the reference for the control logic voltage. Vcc is usually 12.7V. Before outputting VREF, Vcc must be at least 9.3V. In the range of 0-85℃, the accuracy of VREF is ±3.5%.
2 Lamp voltage regulator
Under conditions such as preheating, ignition and lamp shutdown, the maximum open-circuit voltage across the lamp load must be limited. During voltage regulation, the lamp voltage is controlled by the arc voltage of the lamp and is not controlled by the control circuit. When the VLAMP pin voltage exceeds VREF, the lamp voltage comparator detects the VLAMP pin voltage. During this period, the lamp voltage reaches the maximum allowable open-circuit voltage value, and the VLAMP voltage is reduced by the fast frequency increase circuit. The RXCX time constant determines the frequency deviation time of the startup circuit (ratio is 2:1).
3 Undervoltage lockout protection
When the PFC and half-bridge control circuit should be turned on or off, the protection circuit uses the Schmidt trigger to detect the DC power supply voltage at the Vcc pin and determine the upper and lower limit trip points of the power supply voltage. Before Vcc rises from zero volts to the upper voltage limit (11V), the PFC and half-bridge control circuits remain in the off state. Once Vcc exceeds the upper voltage limit, the PFC and half-bridge oscillator circuits start to work. When Vcc is lower than the lower voltage limit (10V), the PFC and half-bridge circuits are turned off. Before Vcc exceeds the upper trip point, the PFC and half-bridge oscillator are not allowed to work. The minimum delay is set by the components outside the DMAX pin.
4 Lamp startup and PFC overvoltage protection
The half-bridge undervoltage lockout circuit samples the DC output voltage of the PFC. Before the PFC output voltage reaches the set value (such as 400VDC), the undervoltage lockout circuit prohibits the lamp from igniting. When the OV pin input voltage exceeds 5/7 VREF, the inverter frequency shifts from the maximum value when the lamp is preheated to the lower frequency when the lamp is normally ignited, and the ignition procedure begins. The
overvoltage protection circuit prevents the PFC DC output voltage from exceeding the set value. When the voltage at the overvoltage comparator input pin OV is much higher than VREF, the PFC buffer gate drive output OUTP is turned off to prevent the PFC DC output voltage from increasing further. The overvoltage protection circuit only protects against overvoltage or overshoot generated by the PFC circuit, and cannot suppress transient voltages on the AC line.
5 Capacitive load protection
The capacitive load protection circuit is used to prevent the half-bridge power transistor from failing when the lamp is removed. When the frequency exceeds the resonant frequency of the half-bridge LC load network, the primary voltage will lead the primary current. The protection logic detects the phase relationship between the resonant current and the voltage of the LC network. The IPRIM pin input voltage is the primary current signal of the LC network. If the IPRIM pin voltage is higher than -100mV (positive), that is, when the gate drive signal is high, the system fails and the frequency of the half-bridge oscillator increases.
6 Half-bridge oscillator
The half-bridge oscillator is a triangle wave generator used to generate a square wave signal to drive the buffer circuit. The oscillation frequency is determined by the resistance and capacitance values of the RT and CT pins, and the CT pin voltage is a triangle wave voltage.
7 Output Buffer Driver
The output buffer is used as a level shifter to convert the low-level logic signals of the half-bridge oscillator and the pulse width modulator into a 10V drive signal to drive the two power switches of the external half-bridge circuit. The OUTH half-bridge buffer/driver circuit drives the external level shift circuit, which then drives the half-bridge power switch. The OUTP output can directly drive the MOSFET or the external level shift circuit combined with the power MOSFET.
8 Pulse Width Modulator
PWM control circuit is used to control the duty cycle of the PFC. The PWM frequency is determined by the half-bridge oscillator. The ramp voltage appears at the CP output pin and is synchronized with the half-bridge oscillator. Therefore, at the valley point of the CT triangle wave, the CP pin ramp voltage starts. When the CP pin ramp voltage exceeds the DC pin output voltage, the capacitor connected to the CP pin is discharged. The resistor and capacitor connected to the DMAX pin control the maximum duty cycle, soft start function and half-bridge cut-off time.
9 Overcurrent Protection
The current value can be detected by the resistor connected to the CSI pin. When the CSI voltage is -500mV, the overcurrent protection circuit is triggered and the OUTP output is turned off. When an overcurrent occurs in the PFC input circuit, the capacitor on the DMAX pin is forced to discharge.
10 Power Factor Amplifier
To modulate the duty cycle of the PFC power switch, the rectified peak AC voltage and phase are detected by the PF amplifier. The power factor input is received through the PF pin. When the AC voltage reaches its peak and crosses zero, the PF pin input voltage is 1V and 0V respectively.
11 DC Error Amplifier
This circuit is used to provide negative feedback of the PFC DC output voltage. The DC output voltage of the PFC is input to the DC pin through a resistor divider and a filter network. The reference voltage of the DC error amplifier is VREF. The DC error amplifier output should be connected to a filter capacitor to eliminate switching noise.
12 Lamp Current Rectifier
The lamp current rectifier is used to provide negative feedback control of the average lamp current. The lamp current transformer (T2) and the load resistor convert the lamp current signal into a voltage, which is added to the L1 and L12 pins. The CRECT pin provides a full-wave rectified output. The external resistors and capacitors determine the gain and time constant of the circuit. The differential error amplifier compares the CRECT pin voltage with the internal 2/7 VREF reference voltage and adjusts the frequency of the half-bridge oscillator to minimize the error voltage and force the average lamp current to be constant.
Keywords:NE5565
Reference address:Explanation of NE5565 electronic ballast controller
The 7.42V reference voltage output from the VREF pin is used as the reference for the control logic voltage. Vcc is usually 12.7V. Before outputting VREF, Vcc must be at least 9.3V. In the range of 0-85℃, the accuracy of VREF is ±3.5%.
2 Lamp voltage regulator
Under conditions such as preheating, ignition and lamp shutdown, the maximum open-circuit voltage across the lamp load must be limited. During voltage regulation, the lamp voltage is controlled by the arc voltage of the lamp and is not controlled by the control circuit. When the VLAMP pin voltage exceeds VREF, the lamp voltage comparator detects the VLAMP pin voltage. During this period, the lamp voltage reaches the maximum allowable open-circuit voltage value, and the VLAMP voltage is reduced by the fast frequency increase circuit. The RXCX time constant determines the frequency deviation time of the startup circuit (ratio is 2:1).
3 Undervoltage lockout protection
When the PFC and half-bridge control circuit should be turned on or off, the protection circuit uses the Schmidt trigger to detect the DC power supply voltage at the Vcc pin and determine the upper and lower limit trip points of the power supply voltage. Before Vcc rises from zero volts to the upper voltage limit (11V), the PFC and half-bridge control circuits remain in the off state. Once Vcc exceeds the upper voltage limit, the PFC and half-bridge oscillator circuits start to work. When Vcc is lower than the lower voltage limit (10V), the PFC and half-bridge circuits are turned off. Before Vcc exceeds the upper trip point, the PFC and half-bridge oscillator are not allowed to work. The minimum delay is set by the components outside the DMAX pin.
4 Lamp startup and PFC overvoltage protection
The half-bridge undervoltage lockout circuit samples the DC output voltage of the PFC. Before the PFC output voltage reaches the set value (such as 400VDC), the undervoltage lockout circuit prohibits the lamp from igniting. When the OV pin input voltage exceeds 5/7 VREF, the inverter frequency shifts from the maximum value when the lamp is preheated to the lower frequency when the lamp is normally ignited, and the ignition procedure begins. The
overvoltage protection circuit prevents the PFC DC output voltage from exceeding the set value. When the voltage at the overvoltage comparator input pin OV is much higher than VREF, the PFC buffer gate drive output OUTP is turned off to prevent the PFC DC output voltage from increasing further. The overvoltage protection circuit only protects against overvoltage or overshoot generated by the PFC circuit, and cannot suppress transient voltages on the AC line.
5 Capacitive load protection
The capacitive load protection circuit is used to prevent the half-bridge power transistor from failing when the lamp is removed. When the frequency exceeds the resonant frequency of the half-bridge LC load network, the primary voltage will lead the primary current. The protection logic detects the phase relationship between the resonant current and the voltage of the LC network. The IPRIM pin input voltage is the primary current signal of the LC network. If the IPRIM pin voltage is higher than -100mV (positive), that is, when the gate drive signal is high, the system fails and the frequency of the half-bridge oscillator increases.
6 Half-bridge oscillator
The half-bridge oscillator is a triangle wave generator used to generate a square wave signal to drive the buffer circuit. The oscillation frequency is determined by the resistance and capacitance values of the RT and CT pins, and the CT pin voltage is a triangle wave voltage.
7 Output Buffer Driver
The output buffer is used as a level shifter to convert the low-level logic signals of the half-bridge oscillator and the pulse width modulator into a 10V drive signal to drive the two power switches of the external half-bridge circuit. The OUTH half-bridge buffer/driver circuit drives the external level shift circuit, which then drives the half-bridge power switch. The OUTP output can directly drive the MOSFET or the external level shift circuit combined with the power MOSFET.
8 Pulse Width Modulator
PWM control circuit is used to control the duty cycle of the PFC. The PWM frequency is determined by the half-bridge oscillator. The ramp voltage appears at the CP output pin and is synchronized with the half-bridge oscillator. Therefore, at the valley point of the CT triangle wave, the CP pin ramp voltage starts. When the CP pin ramp voltage exceeds the DC pin output voltage, the capacitor connected to the CP pin is discharged. The resistor and capacitor connected to the DMAX pin control the maximum duty cycle, soft start function and half-bridge cut-off time.
9 Overcurrent Protection
The current value can be detected by the resistor connected to the CSI pin. When the CSI voltage is -500mV, the overcurrent protection circuit is triggered and the OUTP output is turned off. When an overcurrent occurs in the PFC input circuit, the capacitor on the DMAX pin is forced to discharge.
10 Power Factor Amplifier
To modulate the duty cycle of the PFC power switch, the rectified peak AC voltage and phase are detected by the PF amplifier. The power factor input is received through the PF pin. When the AC voltage reaches its peak and crosses zero, the PF pin input voltage is 1V and 0V respectively.
11 DC Error Amplifier
This circuit is used to provide negative feedback of the PFC DC output voltage. The DC output voltage of the PFC is input to the DC pin through a resistor divider and a filter network. The reference voltage of the DC error amplifier is VREF. The DC error amplifier output should be connected to a filter capacitor to eliminate switching noise.
12 Lamp Current Rectifier
The lamp current rectifier is used to provide negative feedback control of the average lamp current. The lamp current transformer (T2) and the load resistor convert the lamp current signal into a voltage, which is added to the L1 and L12 pins. The CRECT pin provides a full-wave rectified output. The external resistors and capacitors determine the gain and time constant of the circuit. The differential error amplifier compares the CRECT pin voltage with the internal 2/7 VREF reference voltage and adjusts the frequency of the half-bridge oscillator to minimize the error voltage and force the average lamp current to be constant.
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Recommended ReadingLatest update time:2024-11-16 16:00
MEMORY CONTROLLER
1. S3C6410 address space
For memory at the table details
2. SDRAM diagram
3. SDRAM chip capacity calculation: Number of L_BANKs * Number of cells in a L_BANK * Bit width of each cell
4. Complete the SDRAM controller initialization and SDRAM chip initialization according
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