Design of high-power LED constant current drive based on DC/DC regulator

Publisher:码字奇思Latest update time:2012-05-24 Source: 21IC Reading articles on mobile phones Scan QR code
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The data processing of the CNC system refers to the preparatory work after the NC program is sent to the part buffer and before interpolation, which mainly includes decoding, motion trajectory calculation, and feed speed calculation. The selection of a reasonable data processing method will greatly improve the correctness and work efficiency of programming, and facilitate data proofreading, especially suitable for batch parts and regular part program processing. Whether the data processing method is reasonable depends mainly on its continuity, time efficiency and resource occupancy. At present, the data processing methods that improve the traditional data processing methods mainly include: the interpretation method of resource overlapping pipeline processing, the target code compilation method, and the interpretation-compilation method. They each have advantages and disadvantages, such as speeding up the processing speed and reducing the waiting time in different links, but in terms of overall continuity and time efficiency, they are not perfect enough. In order to further improve the processing continuity and processing efficiency, this paper proposes a new data processing method based on the advantages and disadvantages of each algorithm, which is more suitable for the processing of the coding system.

1-digit control code system

The coding system is driven by three stepper motors to code small circular parts. Two sets of symmetrical marking codes consisting of letters and numbers need to be engraved in a ring on the circular surface of the parts. It is stipulated that the number of characters in the marking code on each part is the same (take 6 characters as an example), that is, the size of the target code compiled when each part is processed is the same, and the memory space occupied is the same. The marking code mainly consists of two parts: the code of the whole batch of parts (same) and the individual marking code of each part (different). The letter knife and the number knife required are fixed on the tool, and the position on the part where the code needs to be engraved is aligned according to the rotating tool holder and the rotating part. Therefore, these three stepper motors are used to control the rotation of the tool holder, the position of the part and the depth of the tool holder respectively. Its data processing is to decode the marking code of fixed digits. The main features are: the marking code of each part can be processed as a code segment; corresponding processing can be carried out according to the characteristics of the same code of the whole batch of parts and different codes of each part in the marking code; two sets of identical marking codes are engraved on the parts, that is, the processed data is the same, but the position is changed; the connection speed of each part processing is very fast, and the data processing needs to have good continuity. According to the characteristics of data processing in coding system and combining various data processing methods, a method which is based on the existing data processing methods and more suitable for data processing in coding system is studied.

2 Traditional Data Processing Methods

There are two traditional data processing methods: interpretation method and compilation method.

(1) Interpretation method

The interpretation method is to organize the machining program into a certain form, and the main control program will sequentially take it out during machining, analyze and judge it, and then decode it, and interpret, interpolate and control the part machining program one by one. This method takes up less memory and is simple to operate, but it has disadvantages that are difficult to overcome: the control between each module is sequential, if the interpretation process of a program is slow and the machine tool has a certain waiting time, the machined workpiece will have obvious roughness; it is not easy to handle the transfer between programs, and it is easy to cause pauses and overcuts.

(2) Compilation method

The compilation method is to compile the entire processing program first, put the results into the buffer, and directly start the interpolation interrupt program when processing begins. Take the compiled data from the buffer, calculate and control the processing. The advantages of this processing method are fast processing speed and high efficiency; the disadvantage is that there is a time interval between compilation and processing.

3 Improved data processing methods

3.1 Interpretation of resource overlap water treatment methods

In view of the shortcomings of the traditional method, the traditional interpretation control is improved, that is, the interpretation control method of resource overlapping pipeline processing. Time overlap is the key to pipeline processing. It is not only the time resource overlap of the four processing processes of program input, decoding, interpolation and position control when the CNC device is in NC working mode, but also the time resource overlap between the sub-processes included in the decoding process, that is, program loading, syntax checking, interpretation and tool compensation.

In NC working mode. If t1, t2, t3, and t4 are used to represent the processing time of the four sub-processes of program input, decoding, interpolation, and position control machining, the data conversion time for machining a part program segment will be t=t1+t2+t3+t4; in the decoding process of data processing, t1, t2, t3, and t4 are used to represent the processing time of the four sub-processes of program loading, syntax checking, interpretation, and tool compensation, respectively, and the total data processing time will be t=t1+t2+t3+t4. If the data is processed sequentially in the traditional interpretation method, that is, the second data is processed after the first data is processed, there will be a time interval of time length t between the outputs of the two program segments, and the time-space relationship is shown in Figure 1(a). This time interval is reflected in the motor as the motor turning and stopping, and reflected in the tool as the tool moving and stopping. No matter how small this time interval is, moving and stopping is not allowed in CNC machining.

The overlapping pipeline processing technology can eliminate this gap. The time-space relationship after overlapping pipeline processing is shown in Figure 1(b). The key is time overlap, that is, not one process is processed within a certain period of time, but two or more sub-processes are processed. After time overlap pipeline processing, there is no gap between the output of each part program segment and between each data processing, thus ensuring the continuity of motor rotation and tool movement, and speeding up CNC machining.

This method saves system resources, effectively prevents the formation of memory fragments, and is suitable for large program decoding and complex data processing.

3.2 Target code compilation method

Target code compilation is to execute a part processing program. It only needs to be compiled when it is run for the first time after powering on, and then the obtained target code is stored in RAM. The next time the same part is processed, there is no need to compile the original part program again, and the target code can be executed directly, thus reducing the time taken for each recompilation.

3.3 Explanation-Compilation Method

The traditional interpretation method or compilation method has inevitable disadvantages. The interpretation-compilation method is a method of combining the two methods for data processing. Before starting processing, a section of memory is first opened as a buffer (allocated according to specific circumstances), and then several program segments are compiled at one time until the buffer is full. Then, the compiled program segments are taken out from the buffer for processing. Here, a flag must be set for the processed program. For example, a flag bit bufflag is defined, which is initially False and set to True after the program is processed. When the flag bits of all programs are True, the buffer is cleared and the next batch of compiled program segments are loaded. The decoding buffer is opened when the decoding process is initialized and released when the decoding process is killed. During the life of the decoding buffer, data is continuously written, modified, read out and cleared. For a certain buffer, it continuously receives new part program segments and is continuously processed by each subprocess in turn. This method of dividing a large number of processing programs into several program segments for compilation and processing can effectively reduce the compilation waiting time and increase the processing efficiency.

4 New methods for data processing in coding systems

The above-mentioned data processing methods all have their shortcomings. For example, the resource overlapping pipeline processing interpretation method only shortens the waiting time between processes, and its interpretation stage is not as efficient as the target code compilation method, and the entire decoding processing efficiency is not as good as the interpretation-compilation method; the target code compilation method only optimizes the data processing in the compilation stage; the interpretation-compilation method combines the interpretation method and the compilation method to improve the overall data processing efficiency, but the data interpretation and sending buffer stage is not as efficient as the resource overlapping pipeline processing interpretation method, and the buffer compilation stage is not as efficient as the target code compilation method.

After comprehensively analyzing the advantages and disadvantages of the above methods, a better data processing method is developed for the coding system. The main idea is: the interpretation and compilation method is generally used to open up a section of memory as a buffer, and several code segments are compiled at one time and stored in the buffer until the buffer is full. Then, the compiled code segments are taken out from the buffer for processing. When compiling each code in several code segments at one time, the interpretation method of resource overlapping pipeline processing is used for compilation. And during the compilation process, the target code compilation method is comprehensively adopted. First, the flag bits are judged. If there are the same code segments, the target code compiled by the same code segment is stored in RAM. The next time the same data is processed, the target code in RAM can be directly called. The data processing process is as follows:

(1) Define the buffer data format

According to the fixed length of the part marking code, a certain memory space is allocated as a buffer. Two buffers of the same size are required, one for storing a number of programs (six marking codes of a part); the other for storing the decoding results. The data structure of the buffer is defined as follows:

Each buffer is set with 6 small buffers BUF0~BUF5 to store the 6-bit mark code of each part, and set the corresponding bufflag to 1; after the 6 buffers are full, the data decoding process is carried out in turn, and the processing results are placed in another buffer, and the corresponding bufflag is set to 2; when all 6 buffers are ready (bufflag is 2), processing is carried out, and the buffer corresponding to the processed mark code sets bufflag to 0, and continues to store the next part mark code.

(2) Decoding using the interpretation method of resource overlapping pipeline processing

① Take out the first part marking code from the first buffer, compile it and put the result into the second buffer, and enter the marking code of the second part at the same time.

② Take out the compilation result of the first part from the second buffer and process the first part. At this time, compile the marking code of the second part and put it into the empty second buffer, and input the marking code of the third part at the same time.

③After the first part is processed, continue to process the second part, compile the marking code of the third part, and enter the marking code of the fourth part at the same time.

The overlapping pipeline data decoding process is adopted until the whole batch of parts is processed. The data decoding process is shown in Figure 2.

(3) Compile buffer data

The data compilation stage is the stage of taking data from the first buffer for compilation. The compilation result is stored in the second buffer, and the data is compiled using the target code compilation method. Since the marking code on the part is two sets of symmetrical identical codes and the code of the whole batch of parts is the same, in order to avoid repeated compilation of the same code, two flags accessorynuml and accessorynum2 are defined in the buffer format. Accessorynuml is the target code flag after the compilation of a certain part's individual marking code. 0 means that the code has not been compiled or has been reused once; 1 means that it has been compiled and stored, and has not been reused. Accessorynum2 is the target code flag after the compilation of the whole batch of part codes. 0 means that it has not been compiled or has been reused n times; n means that it is compiled and stored for the first time and has not been reused; i means that it has been reused ni times (n is the number of parts in the whole batch, and i is an integer between 1 and n). When accessorynum1 is 1, it means that the individual marking code of the part will be used again and should be saved first. The next time it is used, it can be directly processed without compiling; because the processed parts are symmetrical. Therefore, the second processing does not need to be recompiled and can be directly processed. When the value of accessorynum2 is greater than O and less than n, it means that the code needs to be saved. Since the code of the whole batch of parts is the same, the code data compiled for the first time can be directly called for processing each part. The two flags of accessorynum1 and accessorynum2 can speed up the data compilation and processing speed, effectively improving the efficiency of data processing.

When one part is processed and the next part is replaced, the data processing of the next part's marking code continues until the entire batch of parts is processed. Waiting is only required when the next part is input or compiled, which requires occupying one of the two buffers, and the compilation or processing of the previous part has not been completed, but this waiting is extremely short.

Experiments have shown that when the resource overlapping pipeline interpretation method is used to implement data processing in the numerical control code system, the coding time for a part is 2.4 seconds; when the interpretation-compilation method is used to implement data processing, it takes 2.3 seconds; and when this new data processing method is used to implement data processing, it only takes 2.0 seconds, which is 16.7% and 13.04% higher than the efficiency of the first two methods respectively. It effectively improves the speed and efficiency of the numerical control code, and has been very stable since its use.

This new data processing method is suitable for decoding a large number of regular or short CNC programs. It can save system resources and speed up data processing. The decoding buffer is statically allocated, which can effectively prevent the formation of memory fragmentation. This method can also make good use of the thread-based preemptive multitasking mechanism provided by the Windows system itself.

2 Improvement plan

Common reference voltages integrated inside the DC/DC switching regulator include 1.23V, 1.25V, 2.5V and 5V. If a constant current source is designed as shown in Figure 2 to power a single 1W white LED with an operating current of 350mA, taking the quasi-voltage Vref = 1.23V as an example, the loss on the sampling resistor is 1.23×0.35=0.4305W. Ignoring the DC/DC converter and other losses, the maximum efficiency of the power supply is:

If a single 3W white LED with a working current of 700mA is powered, the loss on the sampling resistor will be even greater. In order to reduce power consumption and improve efficiency, a small resistance sampling resistor should be used as much as possible. However, after using a small resistance sampling resistor, the feedback voltage Vref in Figure 2 becomes smaller, and the output current cannot reach the ideal value. In order to meet the demand, improve the circuit's sensitivity to the output current change control, and improve the constant current accuracy, it is necessary to add an amplifier circuit to amplify the sampling signal, as shown in Figure 3.

Figure 3 Schematic diagram of improved DC/DC switch constant current source

Figure 3 Schematic diagram of improved DC/DC switch constant current source

When the circuit enters the constant current working state, the output current Iout satisfies formula (3):

Generally speaking, the gain of an operational amplifier can be very large, so a very small sampling resistor can be used in the circuit, thereby achieving the purpose of reducing losses and improving efficiency. Assuming that the sampling resistor is 0.1Ω, when powering a single 1W white light LED with an operating current of 350mA, the loss on the sampling resistor is 0.01225W. Generally speaking, the operating current and maximum operating voltage of a general operational amplifier are about 1mA and 30V respectively. Adding the loss of the operational amplifier and its auxiliary circuits, the total loss of the increased circuit is about 0.05W. Ignoring the DC/DC converter and other losses, the efficiency can reach up to

Efficiency is significantly improved.

Transforming formula (3) yields:

It can be seen from formula (4) that by reasonably setting the values ​​of resistors Rf, R1 and Rs, the required output current value can be obtained and the ideal efficiency can be obtained.

3 Design Examples

At present, many low-cost, high-performance adjustable output DC/DC monolithic integrated switching regulators or controllers can be found on the market, such as LM2577-ADJ, LM2596-ADJ, LT1086-ADJ, TL494, MC34063, etc. LM2596-ADJ is a power management monolithic integrated circuit with adjustable output voltage in LM2596. It integrates fixed frequency generation circuit and frequency compensation circuit internally, and the maximum output current can reach 3A. It has the characteristics of low power consumption (standby current is only 80μA), high efficiency, overheat protection and current limiting protection function, good linearity and load regulation, simple peripheral circuit, etc. Figure 4 shows an LED switch constant current regulated power supply based on LM2596-ADJ.

Figure 4 LED switch constant current regulated power supply based on LM2596-ADJ

Figure 4 LED switch constant current regulated power supply based on LM2596-ADJ

This circuit contains two loops: a voltage control loop and a current control loop. The voltage control loop is composed of an operational amplifier U2A, R1, and R5, and is used to control the maximum output voltage of the power supply. Its output voltage Vout is expressed by equation (5).

In formula (5), Vref = 1.23V, VD = 0.4V. It can be seen from formula (5) that changing the parameters of R1 and R5 can change the value of the maximum output voltage. In the actual application of the LED drive circuit, Vout should be higher than the actual load voltage, and the load voltage VLoad should satisfy formula (6) so that the power supply can automatically work in constant current mode.

The current control loop is composed of operational amplifier U2B, R7, R3, C2, R6, R2, and C5. The output current Iout of the power supply is expressed by equation (7).

As can be seen from formula (7), changing the value of R2, R6 or R7 can change the value of the output current. When the output current is large, R7 can use a smaller resistor to reduce power consumption.

Q1, R4, C6, and ZD1 form the power supply voltage stabilization circuit of the operational amplifier, ensuring that the power supply voltage to the operational amplifier does not exceed its maximum allowable operating voltage.

D6 and D7 form a voltage feedback loop and a current feedback loop to automatically switch the control circuit. When the power supply is working in the constant voltage mode, due to the small load current, the output voltage V2 of U2B is less than the output voltage V1 of U2A. At this time, D6 is turned on, D7 is turned off, and the output of U2B does not affect the output of U2A; when the load current increases to the set value, the output voltage V2 of U2B is greater than the output voltage V1 of U2A. At this time, the power supply automatically switches to the constant current mode, D7 is turned on, D6 is turned off, and the output of U2A does not affect the output of U2B. In the two control loops, only one control loop plays a leading control role at the same time. When the voltage control loop plays a leading role, the output voltage does not change with the change of the load current and maintains a constant value, which is equivalent to a constant voltage source; when the output current of the power supply increases and reaches the set value, the power supply automatically switches to the constant current mode, the current control loop plays a leading role, the output voltage changes with the change of the load, and the output current value remains constant, which is equivalent to a constant current source.

Tables 1 and 2 are the measured data of the LED switch constant current regulated power supply based on LM2596-ADJ. The ideal efficiency in Table 1 is calculated according to formula (8) under the conditions of a switching frequency of 150kHz and a switching time Ts of 0.3μs:

Table 1 Efficiency test data

Table 1 Efficiency test data

Table 2 Constant current accuracy test data

Table 2 Constant current accuracy test data

Formula (8) is the efficiency calculation formula of the Buck regulator under the most ideal switching loss condition, where Vdc is the input voltage of the power supply.

From the test data in Table 1, the measured efficiency is close to the ideal efficiency, exceeding 87% and approaching 88%. This is mainly because the additional circuits such as the small resistance sampling resistor and the low-power operational amplifier added to realize the transformation from constant voltage source to constant current source do not significantly increase the total power loss.

From the data in Table 2, the constant current error of the power supply is less than 1%, which has a very high constant current accuracy. This is because even small changes in the load current can be sensed by the control circuit after being amplified by the operational amplifier, thus keeping the output current at a stable value.

According to formula (7), the output current

However, since the diode D7 in the circuit is in a slightly conductive state, there is a certain deviation between the actual output current value of the power supply and the calculated value, but the error is very small. The ideal current value can be obtained by modifying the value of the feedback resistor.

4 Conclusion

The LED switch constant current regulated power supply based on LM2596-ADJ has been put into practical use, and has been stable and reliable for a long time. The successful design of this circuit shows the feasibility of using the commonly used DC/DC regulator on the market to design an efficient LED constant current drive method, and the materials are widely used and the cost is low. From the experimental data, it can be seen that the circuit has high constant current accuracy and high efficiency. This power supply circuit can not only be used for high-power LED driving, but also for battery charging, etc.

Reference address:Design of high-power LED constant current drive based on DC/DC regulator

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