Requirements for the use of CMOS integrated circuits

Technical requirements for the use of CMOS integrated circuits

1. Requirements for the input terminals of CMOS integrated circuits

CMOS integrated circuits have very high input impedance, and their internal input terminals are connected to diode protection circuits to prevent external interference, impact and electrostatic breakdown. When the input terminal of a CMOS integrated circuit is suspended, the input impedance is high and it is easily disturbed by external noise, causing the circuit to malfunction. This destroys the normal logical relationship and easily causes gate-induced static electricity to cause breakdown damage. Therefore, for the redundant terminals of the "AND" gate and "NAND" gate CMOS integrated circuits, high-level measures are taken; for the redundant terminals of the "OR" gate and "NOR" gate CMOS integrated circuits, low-level measures are taken. If the operating speed of the circuit is not required to be high and the power consumption does not need to be specially considered, the redundant input terminals and the use terminals can be used together to solve the problem. The current at the input terminal cannot exceed 1mA (the limit value is 10mA), and an appropriate resistor must be added to the input terminal for current limiting protection (generally, when the operating voltage is 12V, a 1.2kΩ resistor is added to the input terminal for current limiting protection). The input signal cannot be greater than VDD and less than VSS, otherwise the input protection diode will cause a large current due to forward bias. When working or testing, the power must be turned on before adding the signal, and the signal must be removed before turning off the power. If the rise or fall time of the input signal is too long, it is easy to cause false triggering, resulting in the loss of normal function of the device and loss. For the 4000B series, the rise or fall time is limited to within 15us. Otherwise, a Schmitt trigger circuit must be used to shape the input signal. When the input end of the CMOS integrated circuit is connected to a mechanical contact or used in other special cases, the input wiring is too long. This makes the distributed capacitance and distributed inductance larger, and it is easy to form LC oscillation, which damages the protection diode in the CMOS.

The operating power supply voltage of CMOS integrated circuits is generally between 3 and 18V. Due to the wide operating voltage range of CMOS integrated circuits, they can work without a voltage-stabilized power supply circuit. However, when there are gate circuits for analog applications in the system, the minimum operating voltage should not be lower than 4.5V. Devices operating at different power supply voltages will have different output impedance, operating speed, and power consumption. Please pay attention to this when using them. The output terminal of a CMOS device is not allowed to be directly connected to VCC or VSS, otherwise the device will be damaged.

2. Anti-static requirements

If there are no anti-static measures in the input circuit, CMOS integrated circuits can easily cause devastating damage to the circuit. CMOS integrated circuits should be stored and transported in anti-static materials. Workers should not wear chemical fiber clothes or shoes with hard plastic soles. It is best to ground your hands or tools before touching the integrated block. When straightening, bending or manually welding the device leads, the equipment used must be well grounded. Since the transient energy absorbed by the protection circuit is limited, too large transient signals and excessively high static voltages will render the protection circuit ineffective. When welding CMOS pins, the soldering iron must be reliably grounded, and the residual heat after the soldering iron is powered off should be used for welding. The grounding pin should be welded first to prevent the soldering iron from leaking electricity and breaking through the device input terminal. In short, the static electricity problems that may arise in the packaging, storage, transportation, welding and other links of CMOS integrated circuits must still be treated with caution, and various measures must be taken to prevent them, and the grounding must be good and reliable.

3. Interface and driver requirements

When the CMOS integrated circuit is interfaced with the op amp, if the op amp uses a single power supply and the power supply is the same as that used by CMOS, it can be directly connected. If the op amp uses a dual power supply, CMOS uses another independent power supply. In the circuit, a clamping protection circuit should be used to keep the CMOS input voltage between 10V and ground. The interface resistor serves as both a current limiting resistor for CMOS and a current limiting protection for the diode. The interface circuit of the logic device should mainly pay attention to two issues: level matching and output capacity, which should be considered in combination with the power supply voltage of the device. For example, the connection between the CMOS integrated circuit and other circuits such as TTL. The power supply voltage, input, output level and current of the circuits are different. The output current of the previous circuit must meet the input current requirements of the subsequent circuit: the logic level output by the previous circuit must meet the input level requirements of the subsequent circuit, and the connection between them is completed through a level conversion or current conversion circuit. CMOS integrated circuits can connect several similar circuits on the same chip in parallel to improve the driving capability. You can also use a buffer amplifier with strong driving capability to improve the driving capability.