Using single chip microcomputer and FPGA to realize digital oscilloscope with equivalent and real-time sampling mode

introduction

Since the birth of digital oscilloscopes in the 1970s, they have become one of the essential tools for test engineers. With the breakthrough progress of electronic technology in recent years, a larger market demand for digital oscilloscopes has emerged. In addition, signal transmission is a very important technical link in modern engineering, but in signal transmission, digital signals will interfere with analog signals. The current solution is to use a single-chip microcomputer to achieve mixed transmission of analog and digital signals in a single line, and the testing and debugging requires the oscilloscope to be able to analyze and display digital and analog signals at the same time. Therefore, a design based on equivalent and real-time sampling digital oscilloscope is introduced here.

2 Design

2.1 Sampling plan

A combination of real-time sampling and equivalent sampling is selected. The real-time sampling rate is less than 1 MS/s, and the horizontal resolution is at least 20 points/div. Therefore, the system uses real-time sampling below 50 kHz, and equivalent time sampling from 50 kHz to 10 MHz. The maximum equivalent sampling rate can reach 200 Ms/s.

2.2 Frequency measurement scheme

Since the upper limit of the test frequency of this system is 10 MHz, this frequency is divided into two sections according to the principle of equal-precision measurement and period measurement method. Therefore, the period measurement method is used for the frequency section below 10 kHz, and the equal-precision measurement method is used for the frequency section above 10 kHz, thereby shortening the measurement time.

2.3 Triggering Scheme

Adopt internal software trigger, set the trigger level through software, the Schmitt trigger parameters set by software are easy to modify, and can well suppress the burrs generated by the comparator. When the sampled value is greater than the trigger level, a trigger is generated. This solution can eliminate the burr interference generated by hardware, the trigger and waveform are more stable, and it is easy to adjust the trigger voltage.

2.4 Sample and hold circuit scheme

The sample and hold circuit is built using an emitter follower, analog switch and capacitor. The emitter follower can use an op amp with stable bandwidth and strong capacitive load. There are many TI analog switches, so that its speed can easily meet the requirements. Then, a suitable polyphenylene capacitor with low leakage can be selected to realize the sample and hold circuit.

3 System Hardware Circuit Design

The system has formulated a general plan: the input signal is amplified by program control after passing through the impedance conversion circuit, and then enters the MAX118 for sampling after passing through the sampling and holding circuit. The program control amplification factor and A/D sampling rate are determined by the vertical sensitivity and horizontal scanning speed, and the sampling time is determined by the rising edge trigger judgment and the equivalent sampling control unit. The sampling data is stored in the dual-port RAM, and the display control module reads the RAM content and controls the DAC904 output display. Figure 1 is a block diagram of the overall design implementation of the system.

3.1 Program-controlled amplification and pre-stage impedance matching

The signal is first matched by the impedance of the front-stage AD811 to achieve the input impedance of the system to be 1 MΩ, and then passes through the analog switch MAX308CPE to achieve the selection of different channel amplifications, and finally outputs through the analog switch COM, as shown in Figure 2.

3.2 Sample and Hold Circuit

Based on the sampling frequency band reaching 10 MHz, the system uses the analog switch THS3166, which has the characteristics of low on-resistance, capacitance, low leakage current, low capture time and on-off aperture time, but it only works in the positive voltage range, so a pre-stage adder is required. Add an emitter follower before the switch, and use the strong broadband op amp THS3001 that drives the capacitive load to isolate the front and back stages.

3.3 Shaping and frequency measurement circuit

The high-frequency shaping uses the high-speed comparator MAX913, and the low-frequency shaping uses the low-speed comparator LM311. In order to improve the signal-to-noise ratio of the input MAX913 signal, an infinite gain amplifier is added to its front stage, and a high-frequency operational amplifier LM7171 is used with an amplification factor of 50, which reduces the edge jitter of the MAX913 output pulse. At the same time, in order to avoid the harmonic emission of the high-frequency shaping square wave, the comparator output is divided by 74LS393 and then sent to FPGA for equal-precision frequency measurement. The pulse edge is steeper and easier to measure.

3.4 A/D sampling circuit

A/D converter sampling is an important part of signal processing, which is to digitize analog signals. The pipeline working mode of MAX118 is adopted. In this mode, the operation of MAX118 is intuitive and the control is simple. Figure 3 shows the implementation circuit of MAX118.

4 System Software Design

The simplified system software flow is shown in Figure 4. The main functions of the system adopt a modular design concept, which is selected by buttons, and the menu interface is good, with strong human-computer interaction. In order to display a stable waveform on the oscilloscope, the internal trigger mode is used for scanning. The software setting of the trigger level can better eliminate the interference caused by hardware glitches, the trigger and waveform are relatively stable, and the adjustment of the trigger voltage can be easily realized. In addition, the use of dual-port RAM also enables the system to have the functions of automatic adjustment and waveform storage .

5 Test Results

5.1 Instruments used and test plan

PC: Tsinghua Tongfang P1.7 G, 512 M; DC regulated power supply: SG1733SB; dual-trace oscilloscope: Tektronix TDS1002; simulator: E51/S Weifu; signal source: Agilent 33120A; digital synthesized high-frequency signal generator: SP1461.

Connect the row and column scanning output terminals of the system to the X-axis and Y-axis input terminals of the analog oscilloscope respectively to perform vertical sensitivity and horizontal scanning speed tests, signal amplitude and period tests.

5.2 Test data and analysis

Table 1 and Table 2 respectively give the horizontal sensitivity and vertical sensitivity test data of the system design.

The system voltage measurement error is mainly caused by the front-stage signal conditioning circuit. The measured signal is a wide bandwidth, high dynamic range signal, so the amplitude-frequency characteristics of the front-stage amplifier are very high. The system frequency measurement error is caused by the ±1 error of the frequency standard count in the equal-precision frequency measurement, as well as the comparator edge jitter and working instability.

The system has 3 levels of vertical sensitivity, voltage measurement error less than 2%, 7 levels of horizontal scanning rate, cycle measurement error less than 0.01%, as well as the functions of trigger level adjustment and waveform storage.

6 Conclusion

The digital oscilloscope has added vertical sensitivity and horizontal scanning speed gears, AUTOSET and cursor display, as well as the function of display waveform processing. The displayed waveform has no obvious distortion, the amplitude measurement error is less than 2%, the frequency measurement accuracy is better than 0.01%, and it can perform single triggering and store/call waveforms. The display output of the system adopts the combination of analog oscilloscope and 128×64 dot matrix LCD, with clear waveform display, stable operation, simple operation and friendly human-computer interface.