Xunwei i.MX6ULL development board boot method and image file format

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Xunwei i.MX6ULL development board boot method and image file format [Copy link]

i.MX6ULL boot mode boot mode

I.MX6ULL supports multiple boot modes, and can be booted from EMMC , SD card, NAND FLASH , USB , QSPI and other devices. By looking at Chapter 8 System Boot in the IMX6ULL Reference Manual.pdf , we can understand that after i.MX6ULL is powered on, the program solidified in the chip ROM will select the boot mode according to the value of the BOOT_MODE[1:0] register.

There are two ways to modify the value of the BOOT_MODE[1:0] register: one is to use eFuses (fuse); the other is to set the state of the GPIO corresponding to BOOT_MODE[1:0] . In normal use, we basically use the GPIO state corresponding to BOOT_MODE[1:0] to select the boot mode.

The GPIO pins corresponding to BOOT_MODE[1:0] are BOOT_MODE1 and BOOT_MODE0 , as shown in the following figure:

The two pins BOOT_MODE1 and BOOT_MODE0 have a 100K pull-down by default inside the chip , so these two pins are low level ( 0 ) by default when they are suspended . We lead these two pins to the baseboard and connect them to the dip switch. The other end of the dip switch is connected to the 3.3V power supply through a 10K resistor , so that we can set the status of these two IOs (high level or low level) through the dip switch . As shown in the figure below:

From the screenshot above , we can see that if we want to set BOOT1 and BOOT0 to a high level, we need to set the corresponding DIP switch to the " ON " position, so that it will be pulled up to 3.3V through a 10K resistor. There is a 100K pull-down inside the chip , so the levels of these two IOs are: 100/(10+100)*3.3V=3V , which is a high level.

From the reference manual, we can see that the two IOs BOOT_MODE[1:0] can be set to four states, corresponding to four boot modes, as shown in the following figure:

From the above figure, we can see that BOOT_MODE[1:0] : when set to 00 , it boots from Fuses , when set to 01 , it downloads serially, when set to 10 , it is internal Boot mode, and when set to 11 , it is reserved. We use the "Serial Download" and "Internal Boot " modes.

First, let's look at "serial download", which means that you can download the code to the board through the USB interface ( OTG1 interface of the board) and then run it. In this way, we can realize the burning of the development board image (we will introduce the specific burning method in the following chapters).

Then let's look at the "Internal Boot Mode", which means that in this mode, the chip will execute the boot program solidified in the internal ROM . This program will initialize the hardware and then read the image from the Boot device ( EMMC , SD card, NAND FLASH ) into the memory. If an error occurs during the operation of the "Internal Boot Mode", it will enter the "Serial Download Mode".

When BOOT_MODE is set to "Internal Boot Mode", i.MX6ULL can boot from SPI , EIM , NOR , SD , MMC , QSPI and other devices, and can also configure the corresponding parameters (such as SD bus width , speed, etc.). We can set the boot device and the corresponding parameters using eFUSEs or GPIO (we mainly use GPIO ). Let's take a look at how to set the boot device through GPIO .

From the reference manual, we can see that the boot device is mainly set through three groups of IO , which are BOOT_CFG1[7:0] ,

BOOT_CFG2[7:0] , BOOT_CFG4[7:0] are three groups of IO . As shown in the following figure:

From the above figure we can see that these three groups of IOs that determine the boot device just use the 24 data IOs of RGB . When the i.MX6ULL chip is first powered on, these 24 IOs are used as the function of "selecting the boot device". When the firmware in the ROM loads the boot image from the boot device to the memory and starts running from the boot image ( Uboot ), these 24 IOs can be used as RGB .

Now let's summarize the i.MX6ULL boot process: First, determine the boot mode based on the two IOs of BOOT_MODE ( BOOT_MODE1 , BOOT_MODE0 ). If it is serial download mode, it will enter USB boot mode. If it is "internal boot " boot mode, then determine which device to boot from (read the boot image to memory and start booting) based on the configuration of the three IO groups BOOT_CFG1 , BOOT_CFG2 , and BOOT_CFG4 .

Next, let's take a look at how the three IO groups BOOT_CFG1 , BOOT_CFG2 , and BOOT_CFG4 configure the boot mode. There is a chart on our baseboard schematic diagram:

The leftmost column in the above figure is the supported boot devices, and each column behind it corresponds to the IO of BOOT_CFG . We can see that the boot mode is determined by the two groups of IO , BOOT_CFG1 and BOOT_CFG2 . You may think that so many IOs need to be configured, and the operation is too troublesome. In fact, most of these IOs are pulled down by default, and only 6 need to be configured , as can be seen from our schematic diagram (because we use an 8 -bit DIP switch, two of which are BOOT_MOD ), as shown in the figure below:

From the schematic diagram above, we can see that one end of the 8 -bit DIP switch is pulled up to 3.3V , and the other end is connected to BOOT_MODE1 , BOOT_MODE0 , BOOTCFG2[3] , BOOTCFG1[3] , BOOTCFG1[4] , BOOTCFG1[5] , BOOTCFG1[6] , BOOTCFG1[7] . So to set the boot mode, we only need to modify the status of these 8 bits ( two of which are BOOT_MODE ) IO . Let's look at the meaning of these 6 IOs responsible for the boot mode , as shown in the following table:

According to the table above, when we set the development board to start from serial download, EMMC , SD card, and NAND FLASH , we can set it according to the following table, as shown in the following table:

Below is a picture of the DIP switch on the i.MX6ULL Terminator baseboard, as shown below:

The 8 -bit dial in the figure above , when it is turned to the upper " ON " position, it is 1 , and when it is turned to the lower position, it is " 0 ". The 8 -bit dial can be started in the corresponding way according to the settings in Table 2.1

5.2 Image Format Image Format

The image file of i.MX6ULL consists of the following parts:

1. Image vector table is referred to as IVT .

2.Boot data , startup data.

3.Device configuration data , referred to as DCD , mainly the configuration information of the chip

4. Execution files generated by user code, such as uboot , etc.

Therefore, the image composition of i.MX6ULL is: IVT+Boot Data+DCD+ user program.

Let's first look at the IVT part: it contains the program entry point, a pointer to the device configuration data ( DCD ), and other pointers used by the ROM firmware during the boot process . IVT is stored in a fixed location on the boot device (but the location may be different for different boot devices). IVT is at the beginning of the image file. The following figure shows the position offset of IVT for different boot devices (relative to the device's first address):

Here we take EMMC as an example. From the table above, we can see that its offset is 1Kbyte ( 1024 bytes). Assuming that each sector of EMMC is 512 bytes, our IVT should be saved from the third sector. From the 8.7.1.1 section of the IMX6ULL Reference Manual.pdf , we can see that the data format of IVT is as shown in the figure below:

The Tag is a byte set to 0xD1 , and the length is 2 bytes, stored in big-endian mode, indicating the length of the IVT . The latter Version is the version information, which occupies one byte, usually 0x40 or 0x41 . Since the " IMX6ULL Reference Manual.pdf " document only describes the header and does not cover the description of the other bytes, we can open the compiled Uboot image uboot.imx to view its contents.

Next is Boot data , its data format is as follows:

From the above figure, we can see that Boot data consists of three fields, each field is 32 bits.

Then comes DCD , which is located right after Boot Data . The location of DCD is also defined in IVT . DCD is mainly used to initialize the registers on the chip.

The data format of DCD is shown in the figure below:

The first is the header information, which is a 32-bit header. The specific definition is as follows:

Tag occupies one byte and is set to 0xD2 ; Length occupies two bytes and is stored in big-endian mode, indicating the area size of DCD (including the length of the packet header); Version occupies one byte and is set to 0x40 or 0x41 .

Following the header are the bytes of the CMD configuration register. The structure of each CMD is shown in the figure below:

The first part of the CMD field is Tag , which occupies one byte and is set to 0xcc . Then Lehgth occupies two bytes and is stored in big-endian mode, indicating the length of the CMD (including the header of the CMD ). Parameter occupies one byte. The meaning of each word is shown in the following figure:

The bytes in the above figure indicates the width of the target position, in bytes , which can be set to 1 , 2 , or 4 bytes. Flags is the command control flag.

Then the CMD field is followed by Address and Value/Mask . These two are the register address to be initialized and the value to be set.

Next to DCD is the .bin file generated by our program . So far, we have completed the analysis of the composition format of the i.MX6ULL image. Just reading the above introduction may be boring. Next, let's take a look at the organization format of these data in combination with the uboot.imx image. We use winhex software (under the directory " i.MX6UL Terminator CD Data \02_Software Required for Development" in the CD data) to open the " i.MX6UL Terminator CD Data \06_Development Board System Image \uboot\emmc\u-boot.imx " file in the CD data, as shown in the figure below:

From the above figure, we can see that it is displayed in little-endian format. First, we combine the first 44 bytes into groups of 4 bytes .

is: 0x402000D1 , 0x87800000 , 0x00000000 , 0x877FF42C , 0x877FF420 , 0x877FF400 , 0x00000000 , 0x00000000 .

These 8 sets of data are IVT data, which we organize into the following table:

Then comes the Boot Data field. We combine the next 12 bytes into groups of 4 bytes to get 0x877FF000.

0x0007E000, 0x00000000. We organize it into the following table:

From the table above we can see that DCD mainly makes the following configurations:

1. Enable the clocks of all peripherals.

2. Configure all IO used by DDR3 .

3. Configure the MMDC controller and initialize DDR3 .

This is the end of our introduction to the boot process and boot image file format of i.MX6ULL . Through the explanation in this chapter, we can master the boot settings of i.MX6ULL . The binary .bin file we compiled cannot be burned directly into EMMC . It is necessary to add the data fields of IVT , Boot Data and DCD in front of it . When we burn the image file into EMMC : IVT+Boot Data+CDC+ user's .bin file.

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MartinFowler

Thanks to the OP.

The OP also posted a public account promotion at the end of the post?

塔7呃

Learned

G.栀寒

I learned a lot, thanks for sharing