Learn about logic analyzer testing in seven steps

Timing and protocol are two key points in digital system debugging, and they are also where logic analyzers can play their most valuable role. How can we use a logic analyzer to quickly complete wiring configuration and collect data? This article uses the IIC protocol as an example to demonstrate the actual test.

The logic relationship of the digital system is the key in the communication R&D process, which directly affects whether the entire device system can work properly. Although the oscilloscope can also perform some digital signal analysis, it is limited by the number of channels (usually only 4 channels) and the storage depth (small). The logic analyzer can reach 34 channels, the recording depth can be up to 2G, and combined with the data compression algorithm, it greatly improves the efficiency of engineers' test timing analysis.

Taking IIC as an example, the following will share the logic analyzer test steps.

1. Preparation

The tests mainly include the object under test, logic analyzer, computer, and IIC protocol signal.

Use the standard power adapter to power the logic analyzer and press the power button. Connect the instrument to the PC with a USB cable, open the software, and check whether there is "Online" on the software interface. Connect the IIC protocol (amplitude 3.2V, frequency 50KHz), use the measurement line PODA A1 to SCL, A0 to SDA, and make sure the signal ground wire is connected.

2. IIC bus settings

1. Click the bus name to modify the bus name. It is recommended not to have duplication;

2. The bus name should be related to the channel meaning;

3. Do not add the same bus, the software will filter them out;

4. Do not add buses without channels;

5. Delete unused buses in time to make it look simpler.

The setting effect is shown in Figure 1:

Figure 1 IIC channel opening

3. IIC sampling parameter setting

1. Sampling mode: the difference between synchronous and asynchronous, and the advantages of synchronous sampling;

2. Sampling frequency: The sampling frequency is generally set to 4~5 times of the measured signal. When protocol decoding is required, it needs to be more than 20 times. If the sampling rate is not enough, decoding errors will occur. If the measured signal frequency is high, synchronous sampling should be used;

3. Storage depth: channel multiplexing, segmented storage, compressed storage, recording mode (real-time storage);

4. Threshold voltage: generally set to 1/2 (MAX + MI N);

5. Filter settings: Bus filtering, filter the burr signal of one sampling cycle. Channel filtering, filter 1~2 sampling cycles. Bus filtering and channel filtering are hardware filtering.

The setting effect is shown in Figure 2:

Figure 2 Parameter settings

4. IIC trigger and decoding settings

1. Set the name to custom;

2. The input bus corresponds to a good channel;

3. Set the address bit of the bus.

The setting effect is shown in Figure 3 and Figure 4:

Figure 3 Trigger settings

Figure 4 Property configuration

5. IIC decoding analysis results

Start collecting and storing a piece of data for analysis.

1. The data segment area reflects the waveform and results of specific data analysis;

2. The waveform observation method can be adjusted through the waveform display settings;

3. Through waveform zooming, the specific frame propagation content generated at different times can be observed;

4. The timetable display area will logically parse and convert the content of the entire data segment.

The test results are shown in Figure 5:

Figure 5 Decoding analysis

6. IIC decoding data search

1. Find the bus: IIC;

2. Start time: Ds, A, B;

3. End time: Dp, A, B;

4. Comparison frame type: You can choose it yourself;

5. Data: You can enter the corresponding frame type data in decimal, hexadecimal, or octal.

The setting effect is shown in Figure 6:

Figure 6 Frame search property settings

7. Decode data and accurately locate it

After completing the settings, you can display it by searching for a specific search type, as shown in Figure 7:

Figure 7 Search results display

There are 68 search results in this search. You can observe each search result by the following operation, as shown in Figure 8:

Figure 8 Search result data analysis

ZLG Zhiyuan Electronics logic analyzer has ultra-large storage capacity, intelligent filtering storage, high-fidelity uninterrupted real-time recording, efficient protocol analysis platform, diversified trigger search, flexible parameter measurement, and can locate specific waveform data when the system runs wrong. Developers and testers of digital circuits can use logic analyzers to perform precise state or timing analysis on circuits to detect and analyze errors in circuit design, thereby quickly locating and solving problems.