AI Chiplets, with limited physical space, how to deal with power consumption issues and component design layout challenges?

At present, AI and high-performance computing are driving together, and the application field of high-computing chips is gradually expanding, which brings more and more significant power consumption problems and component design challenges , especially the sharp increase in chip power consumption, but the chip layout space in the high-density packaging environment is becoming increasingly scarce. How to achieve a reasonable layout between chips in the limited physical space of the chiplet, while further reducing the integrity loss in signal transmission and power distribution network (PDN) , has become the key to improving the overall performance and efficiency of the system.

Especially when using high-performance chips with different functions, such as GPUs (graphics processors), it is particularly important to operate at a constant voltage to reduce resistance drop and maintain a stable current supply due to the continuous shrinking of process nodes. How to deal with this challenge is also the focus of many upstream and downstream technology companies at the Xpeedic Core and Semiconductor 2024 User Conference, a leading domestic EDA (electronic design automation) manufacturer !

With the help of this high-end exchange platform held by Xinhe Semiconductor, Murata Manufacturing brought a keynote speech " Solutions for Advanced Packaging (PDN) of AI Chips ". With the help of Murata Manufacturing's deep accumulation and innovative technology in the field of electronic components, a series of advanced solutions and related products such as "miniaturized components", "Low ESL ceramic capacitors", "embedded capacitor substrates", "silicon capacitors" and so on were proposed for PDN optimization. These products can not only effectively reduce the loss in the power path and improve energy conversion efficiency, but also optimize signal integrity to ensure the accuracy of high-speed data transmission.

Since establishing a partnership, Xinhe Semiconductor and Murata Manufacturing of Japan, which occupies a leading position in the global component industry, have been keeping up with the global development trend of EDA tools from chip design to system design analysis upgrade. Especially in the fields of multi-physics analysis and high-speed interconnection, the two sides have formed fruitful solutions and results through in-depth exchanges and cooperation. In order to promote this process, Xinhe Semiconductor and Murata Manufacturing decided to go hand in hand, not only to further strengthen the interconnection and interoperability at the technical level of devices, chiplets and heterogeneous integration on the basis of existing cooperation, but also to explore more innovative cooperation models. Murata Manufacturing is willing to contribute these valuable experiences and advanced technologies to the entire industry, and by sharing its latest research results in PDN design, material science, product technology, etc., it will help other chip designers and system integrators find more efficient and reliable solutions when facing the power consumption and design challenges of high-computing chips. By promoting technical exchanges and cooperation within the industry, Murata Manufacturing looks forward to working with global partners to jointly promote the advancement of semiconductor technology and contribute to the construction of more efficient, green and sustainable electronic information systems.

For more information or cooperation, please contact: eileen.zhang@murata.com