Versal White Paper: The First Adaptive Compute Acceleration Platform (ACAP)

赛灵思正式推出 Versal ACAP，这是一个完全支持软件编程的异构计算平台，可将标量引擎、自适应引擎和智能引擎相结合，实现显著的性能提升，其速度超过当前最高速的 FPGA 20 倍、比当今最快的 CPU 实现快 100 倍，该平台面向数据中心、有线网络、5G 无线和汽车驾驶辅助应用。

Recent technological challenges in semiconductor processes have hampered the expansion of traditional one-size-fits-all CPU scalar compute engines. As shown in Figure 1, changes in semiconductor process frequency scaling have forced standard compute units to become increasingly parallel.

As a result, the semiconductor industry is exploring alternative domain-specific architectures, including those that have traditionally been relegated to specific extreme performance applications, such as vector-based processing (DSPs, GPUs) and fully parallel programmable hardware (FPGAs). The question is, which architecture is best suited for which task?

Launch of ACAP: Optimizing software and hardware for parallel heterogeneous computing

ACAP is characterized by its combination of next-generation scalar engines, adaptive engines, and intelligent engines. The NoC connects them through a memory-mapped interface with a total bandwidth of 1Tb/s+. In addition to the NoC, the large memory bandwidth supported by the programmable logic (and integrated RAM blocks) allows the programmable memory architecture to be hierarchically optimized for individual computing tasks (avoiding the high latency and latency uncertainty inherent in other cache-based computing units).

For more details, please click "Read original text" to download the Versal white paper (Chinese version)