What is SLVS and SLVS signal transmission distance
When we first come into contact with the ST60 chip, we often come across a term: SLVS.
In the ST60 datasheet, you will often see the Differential SLVS signal. SLVS is actually the abbreviation of Scalable low voltage signaling. Differential SLVS means a low voltage differential signal with adjustable level. The ST60 datasheet has the following figure describing the parameters of the SLVS signal:
SLVS Receiver Performance Parameters
SLVS Driver Performance Parameters
From the two pictures above, we can see that the single-ended level output by the SLVS Driver is 80mV-300mV, and the differential level is 160mV-600mV. SLVS is indeed scalable and adjustable. However, the output level of the chip is already pre-written in the register when it leaves the factory, which is 200mV for single-ended and 400mV for differential. If you need to adjust the output level to a higher or lower level, you need to rewrite the register to achieve it. The level range of the SLVS Receiver is 100mV-300mV for single-ended and 200mV-600mV for differential. In other words, the minimum receiving threshold of the SLVS RX is 100mV for single-ended and 200mV for differential. If the signal is too small, errors may occur during transmission. The SLVS signal line transmits a high-speed signal of up to 6.25Gbps, and the differential traces on the PCB board need to be impedance controlled: 100ohm for differential.
In actual engineering projects, SLVS routing is likely to pass through multiple PCB boards, cables, and connectors. For example, in the laptop project shown below, the ST60 is installed on the upper frame of the laptop, and the SLVS routing must pass through the screen board, hinge, and motherboard to connect to the CPU. It may also pass through several FPCs, connectors, etc. What impact will these have on the SLVS signal? What is the maximum routing length supported by SLVS?
The jitter requirement of ST60's SLVS receiving circuit is <0.375UI. As shown in the figure below:
Combined with the SLVS detection threshold minimum difference of 200mV, the following SLVS receiver eye diagram requirements can be obtained:
Long SLVS traces have the following effects on signal integrity:
01
Signal attenuation.
The longer the PCB trace, the greater the signal attenuation. As shown in the figure below, the SLVS Driver output of the ST60 receiver chip is connected to a differential PCB trace (here we take the commonly used FR4 board as an example). Use an oscilloscope to measure the waveform of the PCB input and output respectively to see the impact of different lengths of PCB traces on the SLVS signal. The SLVS Driver output differential level is set to the default value of 400mv.
As shown in the red box in the figure below, in the case of 5Gbps signal, when the PCB trace length is 20mm, the eye height of the received signal is 380mV. When the PCB trace length is 300mm, the eye height of the received signal has been attenuated to 210mV, which is close to the SLVS detection threshold. When the PCB trace length is 500mm, the eye height of the received signal is attenuated to 100mV, at which time the SLVS Receiver can no longer work properly.
02
The impact on jitter.
Long PCB traces will bring more thermal noise, which will increase jitter. As shown in the blue box in the figure above, at 5Gbps rate, the PCB trace length changes from 20mm to 300mm, and the jitter increases from 0.8ps to 13ps. The 0.375UI jitter threshold of a 5Gbps signal is 75ps. Although the 13ps jitter caused by the 300mm PCB trace is much smaller than 75ps, this is only the jitter caused by the PCB trace. In actual situations, such as the notebook project above, the SLVS trace is likely to pass through several circuit boards and connectors, which will inevitably cause crosstalk, discontinuity and other effects. The actual jitter situation is far more serious than that of simple PCB traces.
03
The rising and falling edges caused by distributed capacitance and inductance become smoother.
The distributed capacitors and inductors form a low-pass filter. The steep rising and falling edges are where high-frequency components are concentrated. The SLVS signal will filter out some high-frequency components through the long PCB traces, making the steep rising and falling edges smoother. As shown in the figure below, the long PCB traces will turn the steep edge signal on the left into a smooth edge signal on the right.
04
Long PCB traces passing through multiple connectors will inevitably encounter impedance discontinuities. Impedance discontinuities can cause multiple reflections, resulting in overshoot and ringing in signal integrity.
In summary, if it is a simple FR4 PCB trace, at 5Gbps, the maximum length of the SLVS trace can be up to 30cm in ST60. If the SLVS is a complex case with multiple PCBs and connectors, it is necessary to use an oscilloscope to measure the eye diagram at the SLVS receiving end of ST60 so that the eye diagram meets the requirements of jitter <0.375UI and eye height >200mV. In another case, the SLVS signal is transmitted through an RF cable or a high-speed cable, such as a USB3.0 cable as the physical transmission medium, the loss will be significantly reduced, and the corresponding transmission distance will be greater.
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