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R Classroom | Behavior of gate-source voltage in a bridge structure: when turned off

Latest update time:2022-07-07 19:20
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Improved switching losses via driver source pin


Key Takeaways from this Article

1

The gate-source voltage behavior of SiC MOSFETs in TO-247-4L and TO-263-7L packages with driver source pins is different compared to TO-247N package products without driver source pins.

2

To properly implement a surge countermeasure for the gate-source voltage of a SiC MOSFET, it is necessary to understand the behavior of each voltage.


SiC MOSFETs with a driver source pin behave differently in the bridge configuration than SiC MOSFETs without a driver source pin. In the previous article , we described the behavior of LS (low-side) SiC MOSFETs when they are turned on. This article will describe the behavior of low-side SiC MOSFETs when they are turned off.


Gate in bridge structure -

Behavior of source voltage: When turned off



The following figure shows the waveforms of each switch when it is turned off. The left side shows the TO-247N package product without a driver source pin, and the right side shows the TO-247-4L package product with a driver source pin . Each horizontal axis represents time, and the definition of the time range Tk (k=3~7) is described below the waveform. The circuit diagram on the lower right shows the gate pin current of the TO-247-4L package product in the bridge circuit. In the waveform and circuit diagram, (IV)~(VII) are used to represent the events that occur in each time range. Event (VII) occurs immediately after the end of period T5.


Low-side SiC MOSFET in bridge configuration

Each switch waveform at turn-off

TO-247N Package Products

No driver source pin

TO-247-4L package products

With driver source pin


Definition of time frame

T3: LS conduction period

T4: LS is turned off and MOSFET voltage changes [event (IV) occurs simultaneously]

T5: LS is turned off and MOSFET current changes [event (VI) occurs simultaneously]

T4~T6: Dead time before HS turns on

T7: HS is the conduction period (synchronous rectification period)

TO-247-4L:

When LS is turned off

Gate pin current


In the waveform comparison, events (VI) and (VII) of TO-247-4L are different from those of TO-247N .


Event (VI) is the time point when ID changes, which is consistent with the situation at turn-on. When ID_HS of HS increases sharply, VF_HS of the body diode rises sharply (dashed circle in the previous waveform). Therefore, the current ICGD caused by dVF_HS/dt flows again, and a negative surge is generated.


The figure on the right shows the VDS waveforms on the switch side (LS) and the commutation side (HS) during the turn-off period. As can be seen from the waveforms, as in the case of turn-on, the VDS_HS of HS changes to the negative end when the ID changes (during T5) after the original dVDS_HS/dt (during T4) ends, and dVF_HS/dt is generated.

TO-247-4和

TO-247-4L turns off

VDS Waveform Comparison


Event (VII) is when the change in ID_HS disappears at the end of T5, dVF_HS/dt disappears, ICGD that was supposed to flow into the gate pin no longer flows, and the electromotive force caused by the energy accumulated in the wiring inductance in the current path of ICGD is observed as a positive surge between the gate and the source. However, in the TO-247N package product, this positive surge is almost not observed.



The figure on the right shows the VGS waveform of the TO-247-4L package product when it is turned off. This waveform compares the results of whether surge countermeasures are taken. As can be seen from the figure, as in the case of turning on, the aforementioned surge occurs when no surge countermeasures are taken (Non-Protected). However, after implementing surge countermeasures (Protected), the VGS surge is well suppressed.

VGS waveform when TO-247-4L is turned off

(Are there any countermeasures?)


To suppress these surges, it is necessary to understand the behavior of the gate-source voltage introduced in the previous article and this article, and connect a surge suppression circuit close to the SiC MOSFET as a countermeasure.


For more detailed information, please refer to the " Methods for Surge Suppression of Gate-Source Voltage " in the application guide or the R Class Basic Knowledge SiC Power Devices " SiC MOSFET: Methods for Surge Suppression of Gate-Source Voltage " (currently being published).


END





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