Research progress of sensing-storage-computing integrated technology based on memristor

Latest update time：2020-11-15

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Source: The article is reprinted from the journal Micro-Nano Electronics and Intelligent Manufacturing, author: Li Kun, Cao Rongrong, Sun Yi, Liu Sen, Li Qingjiang, Xu Hui, thank you!

Summary

The traditional von Neumann computing architecture based on CMOS devices is increasingly unable to meet the growing computing energy efficiency and speed requirements of intelligent development. Exploring basic devices based on new physical principles and developing a storage-computing integrated architecture based on this has become a frontier hotspot for academic and industrial circles. The storage-computing integrated technology based on memristors has made important progress and has shown great development potential. On this basis, combined with the development of cross-process monolithic integration technology, micro-nano sensors and memristor storage-computing integrated devices are further integrated, and the construction of a unit integrating perception, storage and processing has become a new technological growth point for the development of this field. This paper reviews the main research directions, research progress, and existing problems of storage-computing integrated technology and sensing-storage-computing integrated technology based on memristors, analyzes the development laws of this field, and proposes development ideas.

introduction

Over the past few decades, transistor integrated circuits have developed rapidly along the lines of Moore's Law, and the performance of electronic computers has been changing with each passing day [1] . Since the invention of electronic computers, the von Neumann architecture has always been dominant, partly because this architecture has a significant advantage in modular engineering design, which allows designers to focus on designing one part to the extreme without having to understand all the parts of the computer in detail. Over the past few decades, the von Neumann system has achieved great success. However, with the advent of the Internet of Things, cloud computing, and the era of big data, the deep analysis and processing of massive unstructured data (such as semantic understanding, image recognition, etc.) requires higher computing speed and computing energy efficiency. The computing system under the von Neumann architecture has gradually become unable to cope with it, and the continuation of Moore's Law is also facing huge challenges. Therefore, finding new energy-efficient computing technologies is an important direction of current research.

In traditional computing systems based on the von Neumann architecture, computing units and storage units are physically separated, and data needs to be frequently transferred between the two, resulting in serious loss of system power consumption and speed. This problem is more prominent when dealing with intelligent processing tasks such as semantic understanding and image recognition, and cannot meet the needs of the current intelligent development of society. To fundamentally solve this problem, it is necessary to collaborate and innovate at multiple levels such as basic devices, circuits, architecture, and systems to develop a new computing system that integrates computing and storage. The integrated computing and storage architecture was first proposed in 1960 [2] , but it did not attract much attention. On the one hand, the rapid development of transistors in the past few decades has led to a satisfactory improvement in computer performance. On the other hand, there has been a lack of basic physical devices that can realize the integrated computing and storage system in the past few decades.

Memristor is a new principle nano device whose resistance is determined by the stimulus history and changes continuously, showing non-volatility [3-4] . Its emergence provides a new physical basis for the development of new energy-efficient, storage-computing integrated computing systems. Memristor has the advantages of high integration density, fast operation speed, low operation power consumption, and non-volatility [5-7] . It is considered to be one of the strong competitors for storage-computing integrated basic devices, and provides a practical solution for the realization of storage-computing integrated technology.

Memristors are usually integrated in high density using a crossbar array. When a column voltage vector is applied to one end of the memristor crossbar array, the output row current vector at the other end is the product of the applied column voltage vector and the memristor conductance matrix. In other words, based on Ohm's law and Kirchhoff's voltage law, the memristor array can complete the multiplication and accumulation of vectors and matrices in one cycle. The multiplication factors are directly stored in the memristor array without the need for separate storage units, thus bypassing the von Neumann bottleneck. Moreover, the computing energy efficiency of this core unit based on the multiplication and accumulation operation of the memristor array is two orders of magnitude higher than that of existing CMOS devices [7] , which is of great significance for intelligent processing tasks with a large number of multiplication and accumulation operations.

The memristor-based storage-computing technology solves the shortcomings of low computing efficiency and high power consumption caused by the separation of processors and memory, and breaks through the inefficiency caused by frequent data scheduling in the traditional von Neumann architecture. However, the use of memristor arrays to realize computing is an analog/digital-analog hybrid computing method. When interacting with traditional digital processing units, a large number of digital-analog and analog-to-digital conversion units are required [8] , which will increase the power consumption and time overhead when converting signal formats. In addition, with the development of cross-process monolithic integration technology, micro-nano sensor devices can be further integrated with memristor storage-computing units, integrating sensing, computing, storage and other functions to build a sensing-storage-computing processing unit. In the sensing-storage-computing technology, the analog signal collected by the sensor is directly sent to the memristor unit for computing and storage, which can further improve the energy efficiency of the system and has become a new technology growth point for the development of this field.

This article will review the main research directions, research progress, and existing problems in this field from two aspects: storage-computing technology based on memristors and sensing-storage-computing technology based on memristors, analyze the development laws of this field, and put forward development thoughts.

Storage and computing technology

The use of memristors to achieve storage and computing integration can be divided into two aspects: digital storage and computing integration technology and analog storage and computing integration technology. Digital storage and computing integration technology is similar to traditional computing methods. It uses memristors to complete Boolean logic functions and implements complex addition, multiplication and other calculations through the combination of different Boolean logic calls [9] . Analog storage and computing integration technology uses Ohm's law and Kirchhoff's voltage law to achieve multiplication and accumulation calculations in one step. Most of the current research work is on analog storage and computing integration technology, and progress is also relatively rapid.

1. Digital storage and computing technology

According to the different types of logical input variables and output variables, the research on memristor-based digital storage and computing can be divided into three types: input and output logical variables are both represented by voltage (VV type), input and output logical variables are both represented by resistance (RR type), and input logical variables are represented by voltage and output logical variables are represented by resistance (VR type).

In the logic gate shown in Figure 1 (a), the two input states x1 and x2 are represented by the voltage values applied to the two ends of the memristor, and the logic output is stored in the memristor. Therefore, this scheme is called a VR logic gate [10] . The memristor is a bipolar RRAM device. A positive voltage applied to the upper electrode can turn the device into a high resistance state (HRS), and a negative voltage applied to the upper electrode can turn the device into a low resistance state (LRS). The calculated output is the resistance state of the device, HRS represents logic 0, and LRS represents logic 1. When the input logic voltages are equal, that is, x1 = x2 = 1 or x1 = x2 = 0, the voltage drop through the RRAM device is 0, and the resistance state of the device remains unchanged; when x1 = 1 and x2 = 0, the device turns into HRS, that is, the output is 0; when x1 = 0 and x2 = 1, the device turns into LRS, that is, the output is 1. Since RRAM devices are non-volatile, the calculation results can be stored in the RRAM device without being transferred to a dedicated storage device, and can be used for the next calculation. The logical operation process in this process is essential implication logic (IMP). Since IMP is functionally complete, all 16 types of Boolean logic can be implemented through more VR logic gate combinations [10] .

Figure 1. Memristor-based logic gates and truth table

In VR logic gates, the output information is stored in the memristor state, which is different from the input signal voltage value [11] . Therefore, the cascade between logic gates must be implemented through additional circuits, which increases the size, complexity and power consumption of the computing system.

1 (c) shows a VV logic gate, where both input and output are represented by voltage, low voltage represents 0, and high voltage represents 1 [12] . The VV logic gate can also be viewed as a simple perceptron network, where the output is the weighted sum of the input voltages, where RL is the load between the common node and the ground, the output voltage V com = RL ∑ G j ( V j - V com ) , G j is the conductance of the jth memristor, and the output voltage is usually read by a comparator. By adjusting the values of memristors G1 and G2, linear separation of all input values 0 or between can be obtained, that is, all linearly separable Boolean logic functions can be realized [13] . In the VV logic gate, the comparator is a relatively large circuit, but since both the input and output are voltage values, cascade operation can be realized.

Figures 1(e) and (g) show the RR logic gate [14] , where the input and output are the resistance states of the memristor, the logic calculation is also performed inside the memristor, and cascade operation can be performed, which is also called state logic [15-16] because it relies on the non-volatile state of the memristor. When voltage is applied, Figure 1(e) implements the RR logic gate in parallel configuration, the voltages applied to both ends are V set -Δ and V set +Δ, V set is the set voltage, Δ is generally 10% V set , the inputs are x 1 and x 2 , the output is x2 after the voltage is applied, the high resistance state represents 0, and the low resistance state represents 1. The implemented logic function truth table is shown in Figure 1(f). Figure 1(g) implements the RR logic gate in series configuration, the inputs are x 1 and x 2 , the output is the resistance state of x 1 or x 2 after the voltage is applied , when VA is applied to x 1 and -VA is applied to x 2 ( V set > VA > 0.5 Vset ) , the "or" logic operation is implemented. Other Boolean logics can be realized by different structures and voltage application methods.

Compared with VV and VR schemes, RR logic gates have many advantages, including the ability to operate in cascade and to be configured as different logic functions by applying different voltages. The implementation of logical operations using memristors unifies the computing process and the storage process, thus overcoming the "storage wall" problem of today's computing architecture [17] . However, there are still two problems: the size of the prepared devices is relatively large, the power consumption is relatively high, and the advantages of a single operation compared with CMOS transistor circuits at advanced technology nodes are not obvious [18-19] . Further optimization is needed in terms of current characteristics, and the performance of small-sized devices must be verified; the currently implemented logical calculations are relatively simple, and the overall stability of the system has not been verified when implementing complex functions.

2. Analog storage and computing technology

The core of analog storage-computing integrated computing is to use memristor arrays to implement multiplication and accumulation operations. Compared with transistor circuits, memristor arrays have the characteristics of high integration density, fast computing speed, and high energy efficiency when performing related calculations. In 2015, Prezioso [20] prepared a 12×12 memristor array and constructed a small single-layer perceptron system. The array scanning electron microscope image and network structure are shown in Figure 2. 33 3×3 "Z", "V", and "N" letter images were correctly classified. In the process of network implementation, a 10×6 memristor array was actually used, and the system power consumption was about 1W/cm². The network adopts an online training method, using the Manhattan distance between the actual output and the ideal output of the network as the error function, and updating the weights at a certain learning rate. After 23 training cycles, the network can achieve correct classification of all images. The size of the device is 200nm×200nm, and it is expected to reach 30nm×30nm in the future, so that the integration of the entire network can reach 10 10 / cm², further improving the energy efficiency ratio.

Figure 2. Array scanning electron microscope image and network structure diagram

The STDP rule is a common computing method in biological neural systems. It has important research value for realizing brain-like computing and simulating the storage-computing integrated computing method of the human brain. In 2016, Erika et al. [21] proposed a pulse neural network based on a memristor array, which was trained using the STDP learning rule of biological neural networks. This article uses HfO2 multi -valued memristors to realize unsupervised learning of five letters "A", "E", "I", "O", and "U". As shown in Figure 3, there are 25 pre-neurons at the input end and 5 post-neurons at the output end. They are fully connected to each other through 125 memristor arrays. The input image size is 5×5 and is connected to each pre-neuron. Even if the noise of the letter data reaches 30%, the network can still recognize it well. Compared with transistors to implement STDP operations, memristor arrays have obvious advantages. The electrical characteristics of memristors are similar to neural synapses, while traditional circuits require a large number of transistors to implement related functions.

Figure 3. Fully connected spiking neural network (25 front neurons and 5 back neurons connected by 125 artificial synapses)

The preparation and successful application of small-scale arrays have verified that memristors have the advantages of low power consumption and high speed in realizing storage and computing integrated architectures. However, due to the small size of the arrays, only single-layer perceptron structures are implemented, which can only achieve linear classification of simple data, which is far from the complex and changeable real-world application requirements.

The increase in array size enables complex applications. Traditional architectures for face recognition have high overall energy consumption and relatively slow computing speed. Peng et al. [22] prepared a 128×8 multi-valued memristor array in 2017, using TiN/TaO x /HfAlyO x / TiN as the resistive material. As shown in Figure 4, they trained and recognized face images containing 320 (20×16) pixels. When updating the memristor weights, two conditions were added: weight verification and no weight verification. The update process with verification took 422.4 ms and consumed 61.16 nJ of energy, while the update process without verification took 34.8 ms and 197.98 nJ, with recognition rates of 88.08% and 85.04%, respectively. When noise was added to the image, the recognition rate gradually decreased as the proportion of noise pixels increased. Their array uses a 1T1R structure, which can effectively suppress the leakage current problem in large-scale arrays [23] .

Figure 4.1T1R memristor array for face recognition

The development of large-scale arrays has further laid the foundation for the practical application of memristor arrays, and verified the feasibility of 1T1R structure in suppressing leakage current problems in large-scale arrays. Various application scenarios have demonstrated the ability of memristors to achieve storage and computing applications. However, during the test process, the peripheral circuits are still too complicated, and there is an urgent need to integrate some peripheral circuits into the memristor array chip, develop a resistive material system compatible with CMOS technology, and further unleash the huge potential of memristors in the field of storage and computing.

Domestic and foreign researchers have also conducted a lot of research on the chip-based memristor. Taking advantage of the volatility of the state of a memristor, a memristor can be used to make a physical random number generator, which has important applications in the field of information security. As shown in Figure 5, in a work reported by Pang et al. [24] in 2019, the researchers integrated two 8Kb memristor arrays using a 130nm process. The resistance value at the same position after reset was used as the source of random numbers. The generated data passed nine NIST randomness tests, with good data independence both within and between chips, realizing a true random number generator chip. Therefore, compared with traditional physical random number generator units, memristors have the advantages of simple operation, easy implementation, high reliability, and strong randomness.

Figure 5. Chip structure diagram and parameter summary table

In addition, Xue et al. [25] used a 55nm process to manufacture a 1Mb 1T1R array in 2019. Under the control of FPGA, CNN operations can be effectively performed, and the calculation accuracy of the CIFAR-10 data set reached 88.52%. The chip structure is shown in Figure 6. The energy consumption is 53.17 TOPS/W when operating under binary conditions, and the processing energy consumption is 21.9TOPS/W under multi-valued conditions, which is very energy-efficient.

Figure 6. Chip structure diagram and parameter summary table

3. Thoughts on the development of storage and computing integration technology

At present, although the storage-computing integrated architecture using memristors has made encouraging progress and is in a rapid development stage as a whole, many problems have not yet been solved. These problems are also important directions for the future development of this field.

First, the preparation process and integration scale of memristor devices have made certain progress, but the device parameter uniformity and reliability are far from the application requirements. High-performance and stable memristor devices are the premise and foundation for conducting application research. Research has been carried out simultaneously at home and abroad, and memristor devices of various materials, structures and scales have been designed and prepared, and the device performance has developed towards supporting applications. However, the parameter uniformity and reliability of the device are restricted by materials and processes, and it is difficult to meet the needs of large-scale practical applications. This is a research problem currently faced by both China and abroad. Therefore, accurately characterizing the conductive mechanism of the device, improving the parameter uniformity and reliability of the device by precisely controlling the internal ion transport process of the device, designing and preparing devices that meet different application requirements, and developing a stable and reliable memristor array integration process are still the main research directions in the future.

Second, large-scale integration of memristors is a prerequisite for their application. The key basic issues that restrict the scale of integration include crosstalk in memristor arrays and the preparation process of memristor arrays. The crosstalk problem refers to the interference of bypass current channels in memristor arrays on the read and write operations of target devices, which is a key physical factor that limits the scale of memristor arrays. The integration of memristor devices with transistors or gating devices is the main way to solve the crosstalk problem. Among them, high-performance gating devices are the key to achieving high-density three-dimensional integration of memristors, and there is currently no mature solution. The uniformity and stability of the memristor array preparation process and its compatibility with CMOS manufacturing technology are technical factors that limit the scale of memristor arrays. Therefore, based on the optimization of unit performance, developing key technologies for large-scale integration of memristor arrays based on the CMOS manufacturing platform is an important basis for promoting the application of memristors.

Third, the research on digital storage and computing integrated logic operation units has made some progress, but there are almost no results that can demonstrate the actual processing capabilities of digital storage and computing integrated. At present, the research in this field mainly focuses on the design and implementation of Boolean logic and arithmetic operation units. my country's overall research level is in a parallel position and has a good development foundation. However, the research on the architecture of digital storage and computing integrated processing systems is still relatively preliminary, and the results of processing systems with actual available capabilities are rarely reported. Therefore, the design and optimization of logic operation and arithmetic operation units, the design of processing system architecture, the development of dedicated and small-scale processing systems, and the promotion of their development towards general and large-scale development are the future development trends. The research on analog storage and computing integrated processing systems has made some progress, but the scale is small and has not yet formed actual processing capabilities. The advantages of memristors in integration density, operating power consumption, analog characteristics, etc. make them have broad application prospects in the field of analog storage and computing integrated processing. At present, the research in this field mainly focuses on the plasticity of neuromorphic devices based on memristors and the verification of neuromorphic processing principles. my country's overall research level keeps pace with that of foreign countries. The research on neuromorphic processing systems is in the stage of small-scale recognition machine prototype design and development, and the information processing capabilities and application demonstrations are still very limited. Therefore, under the premise that the scale of memristor synaptic arrays is limited, the innovative network architecture integrating multiple layers and multiple small-scale arrays to obtain comparable and available actual processing power and demonstrate applications in complex computing tasks is the focus of future development.

Sensing, storage and computing integrated technology

The integrated storage and computing architecture solves the problem of low computing efficiency and high power consumption caused by the separation of processor and memory, and breaks through the inefficiency caused by frequent data transmission in the traditional von Neumann architecture. Considering the entire information acquisition and processing process, after obtaining external information, it must be sampled, quantized and stored before being transmitted to the processing unit. The time and power consumption spent in this process cannot be ignored. Memristors can directly process analog signals. Therefore, it is feasible to send the analog signals collected by the sensor directly to the memristor processing unit for calculation [26] , without the need for ADC sampling, quantization and storage process, which greatly improves the system performance, that is, integrating perception, storage and calculation to build an integrated sensing, storage and computing architecture. At present, there have been many explorations in this regard.

1. Pressure sensing storage and computing technology

The tactile receptors under the skin can receive external pressure stimulation, and the response signals generated are transmitted to the brain through the nervous system, thus forming the sense of touch. The tactile signals are stored by the nervous system and become tactile memory. Tactile memory can help us better interact with the external environment, as shown in Figure 7 (a). For example, when facing an unfamiliar fragile object, we often don’t know how much force we need to use when picking it up for the first time, and it is easy to damage it if we use force rashly. After several attempts, we can roughly judge the force required to pick up the object. At this time, the tactile memory of the object is formed, and we can pick it up without thinking and will not damage it. This situation is everywhere in daily life, such as picking up eggs, glasses, etc. At present, with the rapid development of artificial intelligence, people hope that robots have various "feelings" while having intelligence. Touch, as a basic sense for interacting with the outside world, occupies an important position. Therefore, it is particularly urgent to develop artificial tactile memory units.

Figure 7. Tactile memory unit based on resistive memory

A basic tactile memory unit integrates a pressure sensor and a memory module to simulate biological tactile memory. Zhu et al. [27] connected a resistive pressure sensor and a resistive memory in series to form a tactile memory unit, as shown in Figure 7 (b). This device combination uses the voltage division principle to store sensor signals: a DC voltage is applied to both ends of the series combination unit. In the default state, the voltage divided between the two ends of the resistive memory is lower than its resistive threshold voltage, so no resistive switching occurs; when external pressure is applied to the pressure sensor, the resistance value of the sensor itself will decrease, thereby increasing the voltage across the two ends of the resistive memory. When the voltage is higher than the threshold voltage of the resistive memory, the memory unit will resistively switch, thereby recording the tactile (pressure) sensor signal. The structure of this combination is shown in Figure 7 (c). The pressure sensor uses Ag nanowires (AgNWs) as the pressure sensitive layer and is integrated on a dimethylsiloxane (PDMS) flexible film. Since the inverted pyramid structure of the Ag nanowires can easily undergo large deformation under the action of weak external pressure, the sensor is very sensitive in the low pressure range (<1KPa). The RRAM adopts the classic metal-insulator-metal (MIM) structure, in which SiO2 is used as the RRAM layer, which has the advantages of non-volatility, fast RRAM speed and high durability. When no external pressure is applied, the initial resistance of the sensor and the RRAM is very high. At this time, a DC scanning voltage is applied to the series unit, and the response current remains very small; after applying a pressure of 500Pa to the sensor, the voltage across the RRAM exceeds its RRAM threshold voltage when the voltage is applied again, so it changes from a high resistance state (HRS) to a low resistance state (LRS), storing the tactile information; when a negative scanning voltage is applied again, the RRAM can be restored to a high resistance state, thereby erasing the stored sensor information, as shown in Figure 7 (d).

In order to prove the feasibility of the tactile memory unit to simulate the skin, Zhu et al. also prepared a 4×10 tactile memory unit array. The array was then used to sense and store letter-shaped pressure patterns, including "N", "T", and "U", as shown in Figures 8 (a) and (b). During the experiment, only the receptors located at the letters could receive the pressure and transmit the signal to the memory for storage. Figure 8 (c) shows that all three letters were successfully sensed and recorded. After a week, the "T"-shaped letter was still successfully maintained and had the ability to be re-perceived after erasure, as shown in Figure 8 (d).

Figure 8. Tactile memory cell array’s perception and storage of pressure patterns

In addition, Kim et al. [ 28] successfully achieved control of cockroach foot joint movement using artificial tactile receptors. They developed an afferent neural unit, including a resistive pressure sensor, an organic ring oscillator, and a transistor synapse, to simulate the human perception, encoding, and transmission of touch, as shown in Figure 9 (a) and (b). The neural unit grows on an organic flexible substrate, and its signal transmission process is as follows: the pressure sensor converts the external pressure into a level signal, and the oscillator forms a pulse signal; compared with a pure level signal, the pulse train has a stronger anti-noise ability. After the pulse signal is transmitted to the transistor synapse, it stimulates it to generate a postsynaptic current. Since the transistor synapse has different responses to the amplitude, frequency, and interval of the input pulse, the size and interval of the pressure applied to the sensor will also produce different modulations on the transistor synapse. The synaptic transistor backend can then interact with other biological neurons to realize biological neural functions.

Based on the above information transmission mechanism, Kim et al. [28] connected the neuron to the isolated cockroach leg to form an artificial-biological hybrid monosynaptic reflex arc, as shown in Figure 9 (c) and (d). An op amp was added to the back end of the transistor synapse to convert the postsynaptic current into a voltage signal and amplify it to drive the movement of the cockroach leg. After receiving the stimulus, the cockroach leg will stretch and generate an outward force at the appendage. Figure 9 (e) shows the typical reflex arc function: when pressure is applied to the sensor, the cockroach leg stretches outward, generating a reflex response. In addition, the effects of the size and interval of the pressure mentioned above on the reflex arc response are also confirmed, as shown in Figure 9 (f) and (g).

Figure 9. Tactile memory applied to motion control

At present, the work on tactile perception-memory units has realized the functions of tactile perception, storage, transmission and interaction with organisms, and has important application prospects in the fields of bionic sensors, prosthetic repair and building more bionic artificial intelligence systems. However, there are still two problems that need to be solved. First, in terms of sensors, the devices need to maintain stable performance on bionic flexible substrates and be able to withstand the effects of deformation such as bending and stretching. In addition, there is still a large gap between the current sensors and biosensors in terms of accuracy, integration and other indicators; secondly, in artificial intelligence networks, building hardware neural networks with perception functions based on tactile sensors is also a topic that needs in-depth research.

2. Optical sensing, storage and computing technology

Vision is an important sense for humans. Nearly half of the cerebral cortex is busy processing visual information. Through vision, we can judge the size, shape, color, brightness, distance, position, smoothness, roughness, etc. of an object [29] . Human visual memory begins with the retina receiving image information and ends with the neural network storing image information, as shown in Figure 10(a). Simple image sensors can perceive simple images in real time, but when the external image stimulus is removed, the image information will gradually disappear, and there is no function to remember image information. Currently, inspired by the human visual perception and memory system, some researchers have integrated light detectors with memory to realize the perception and memory process of light signals, providing a basis for human visual memory bionics.

At present, Chen et al. [30] used a direct printing method to prepare a sensing-memory integrated device for detecting and memorizing ultraviolet light signals. They connected an In2O3-based light sensor in series with a non-volatile memristor, as shown in Figure 10 (b). The light sensor detects ultraviolet light and converts it into an electrical signal and transmits it to the memristor to store information, realizing the perception and memory function of ultraviolet light. The prepared 10×10 light sensing memory array can detect and memorize the distribution image of ultraviolet light in real time. In this work, image perception and memory are integrated, and the light information image can be memorized for a long time even after the light stimulation is removed, as shown in Figure 10 (c), which is closer to the perception and memory function of the human visual system. However, in the human visual system, the neurons on the retina can not only perceive and memorize light information, but also perform simple preprocessing of light information, which is also one of the main characteristics of the retina. However, in this work, the stored optical image is not processed, and the true sense-storage-computation integration is not realized.

Figure 10. Vision system based on the integrated structure of In2O3 sensor and memristor

Recently, Seo et al. [31] have realized simple preprocessing based on the perception and memory of optical information. They connected the h-BN/WSe2 optical sensor and the h-BN/WSe2 three -terminal memristor in series, as shown in Figure 11 (a). The optical sensor converts optical information into electrical signals and transmits them to the three-terminal memristor for storage, realizing the recognition and memory of optical information. The difference of this work is that it can realize the detection of mixed color light stimulation and realize online training and learning. Different colors of light stimulation have different wavelengths, and the amount of photons absorbed by the optical sensor is different, so the resistance state of the optical sensor changes with different amplitudes. The voltage drop applied to the three-terminal memristor can be adjusted and show stable and distinguishable characteristics. Compared with traditional neural networks (NNs), the optical neural network (ONN) constructed based on a simple 28×28 array can not only reduce the complexity of peripheral circuits such as filtering, but also realize online training. The recognition rate after training is as high as more than 90%, as shown in Figures 11 (b) and (c). The sensing, storage and computing integrated device demonstrated in this work can not only reduce the complexity of peripheral circuits but also transmit light information in the form of neural signals. The constructed neural network can realize training and learning in complex light environments, which is closer to the complexity and preprocessing functions of human visual perception systems. However, in this work, the optical memory and processing units cannot directly respond to light stimulation. Additional image sensors are required to convert light signals into electrical signals and transmit them to the neuromorphic chip for the next step of signal processing. Discrete light perception and memory systems are not conducive to large-scale integration in the future. It is an urgent need to develop a multifunctional device that integrates sensing, storage and processing functions to achieve a more efficient artificial vision system.

Figure 11. Visual system based on h-BN/WSe2 three-terminal memristor

Compared with discrete light sensing and memory systems, simple two-terminal photoresistor devices can directly sense and store light information, which not only reduces complexity but also facilitates low power consumption and large-scale device integration. Tan et al. [32] constructed an ITO/CeO 2-x /AlO y /Al photoresistor device, integrating light perception and memory into one device, as shown in Figure 12 (a). Through the capture and release of CeO 2-x /AlO y electrons, light information is converted into electrical information, and the perception of light in different bands is achieved and stored in the device unit to achieve non-volatile storage, as shown in Figure 12 (b). In this work, a simple two-terminal device was used to achieve the perception and memory of light in different bands, reducing the complexity of the device. However, this work only performed storage and did not pre-process the relevant information.

Figure 12. Visual system based on ITO/CeO2-y/AlOy/Al two-terminal memristor

In 2019, Zhou et al. [33] proposed a Pd/MoOx/ITO two-terminal photoresistance memory device (ORRAM), as shown in Figure 13 (a), which can not only perform image perception and memory, but also realize image preprocessing functions such as enhancing image contrast and reducing image background noise, effectively improving image quality. The ORRAM structure has different conversion rates of Mo ion 6+ and 5+ valence states under different lighting conditions, which can adjust the device resistance state and realize light-adjustable plasticity synapses (STP, LTP) to simulate the learning and memory functions of the human brain. The constructed 8×8 simple array realizes the image preprocessing functions of enhancing image contrast and reducing background noise, as shown in Figure 13 (b). In this work, the ORRAM device integrates image perception, memory and preprocessing, and has a simple two-terminal structure that is conducive to large-scale device integration in the future. Moreover, the device perceives information and transmits graphic information in the form of neural signals, has light-adjustable and time-dependent plasticity, and is easier to simulate the human visual perception system. In this work, the ORRAM device performs ultraviolet light perception, memory and preprocessing, but in fact, the light information that the human visual perception system needs to process is much more complex.

Figure 13. Visual system based on Pd/MoOx/ITO two-terminal photo-induced memristor

With the development of artificial vision technology, photoresistive random access memories and optoelectronic synaptic devices that can directly respond to light stimulation and temporarily store and process visual information and perception data in real time have gradually become hot topics in future artificial vision research.

3. Gas sensing, storage and computing technology

Humans can identify the concentration and composition of gases through their sense of smell, which in turn affects our judgment of whether the gas is dangerous or pleasant. Human olfactory memory begins with the receptors in the nasal cavity receiving odor information and ends with the storage of odor information in the olfactory cortex of the brain. Multiple recognition experiences are more conducive to our accurate judgment. Inspired by the human olfactory perception and memory system, integrating gas detectors and memory can simulate the human perception and memory process of gas information and achieve bionics of human olfaction. Shulaker et al. [34] integrated more than 1 million memristors and more than 2 million CNT transistors on a chip, integrating gas sensing, storage and computing, and constructed a 3D integrated nanosystem. The 3D structure was constructed by stacking four layers of perception layer, storage layer, computing layer and data interface layer. Each unit includes two CNT transistors, one RRAM and one Si-based transistor. The entire chip consists of more than one million repeating units, realizing the perception, data storage and in-situ classification and recognition of seven gas atmospheres, as shown in Figure 14 (a). In this work, CNT transistors can sense the surrounding gas and convert gas information into electrical signals and directly transmit them to the RRAM memory array layer for data storage. The interface module composed of Si-based transistors amplifies and selects the data stored in the RRAM unit and then transmits it to the CNT transistor computing layer for classification. The CNT transistor computing layer compares the received information with the previously trained and learned off-chip data to identify the type of gas detected. As shown in Figure 14 (b), the 3D integrated nanosystem can accurately classify and identify 7 types of gases. In this work, the emerging nanotechnology of CNT transistors is used, which is conducive to the realization of energy-saving and high-density data storage. It is the most complex nanoelectronic system to date. However, in this work, there are many gases (alcohol, white wine, vodka) with relatively small response differences, and amplifiers are required to amplify the signal so that the computing layer is sufficient for calculation and classification, which will undoubtedly increase the complexity of the structure.

Figure 14. Gas sensing, memory, and classification nanosystem based on 3D integrated structure

4. Sensing, storage and computing integrated technology

Development Thoughts At present, the development of the integrated sensing, storage and computing architecture is still in its infancy. There are many branch areas that can be explored and studied. The current research work is relatively small and simple. Most of the prepared devices are in the stage of unit devices (or discrete device arrays that have not yet been interconnected). They only have simple sensing and storage integration, or sensing and storage integration plus simple processing. They have not yet formed a true sense-storage-computing integration. However, the research related to memristor storage-computing devices is relatively mature. After solving the high-density three-dimensional integration process of memristor storage-computing devices and micro-nano sensors and analog signal matching and other key technologies, the sensing, storage and computing technology based on memristors will enter a rapid development stage. This article looks forward to and reflects on three aspects: device performance, array integration and circuit system architecture.

First, device performance. Current research on integrated sensing, storage and computing devices is mostly based on simulating a certain sense and simple processing, such as touch, vision, smell, etc., and the processing capacity is very limited. However, in fact, the external environment in which the human perception and memory system is located is more complex. On a very small sensory unit, it can simultaneously perceive touch, pain, and temperature. It can also perceive external pressure and different temperatures and process information. Therefore, developing a device system with multi-sensory fusion and diversified processing functions to reduce the gap with application needs is a hot direction for future applications.

Second, in terms of large-scale integration. Most of the current research is based on simple arrays of discrete device units, which are small in scale and do not realize the interconnection between device units, and cannot give full play to the advantages of efficient parallel computing of integrated arrays. Solving cross-process integration technology problems and developing reliable three-dimensional integration technology are important foundations for future large-scale integrated sensing, storage and computing.

Third, in terms of the peripheral control circuit architecture. After the sense-storage-computing integrated device performs simple preprocessing on the sensed information, it is necessary to build a system-level architecture to perform more complex information processing in order to have processing capabilities close to actual applications. Currently, research in this area is still in its infancy, and in the future, it is necessary to conduct in-depth research on the sense-storage-computing integrated information processing architecture, task scheduling, and division of labor and cooperation strategies.

This article is provided by "Yiban Editor"

References:

Li Kun, Cao Rongrong, Sun Yi, et al. Research progress of sensing, storage and computing integrated technology based on memristor[J]. Micro-Nano Electronics and Intelligent Manufacturing, 2019, 1(4): 87-102.

LI Kun, CAO Rongrong, SUN Yi, et al. Research progress on the fused technology of sensing, storage and computing based on memristor[J]. Micro/nano Electronics and Intelligent Manufacturing, 2019, 1(4): 87-102.

Micro-Nano Electronics and Intelligent Manufacturing, publication number: CN10-1594/TN

Supervisory unit: Beijing Electronics Holdings Co., Ltd.

Sponsor: Beijing Electronic Technology and Science and Technology Information Research Institute

Beijing Fanglue Information Technology Co., Ltd.

Email for submission: tougao@mneim.org.cn (Website: www.mneim.org.cn)

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