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According to US media Anandtech, Micron recently announced its fifth-generation 3D NAND flash memory, which has a record-breaking 176-layer structure. The report pointed out that the new 176L flash memory is the second generation product launched since the dissolution of Micron's memory cooperation with Intel. Since then, Micron has changed from a floating-gate memory cell design to a charge-trap cell.
Micron's previous generation of 3D NAND was a 128-layer design, which was a short transition node for them to work out any issues with the switch to Trap Flash. Micron's 128L flash has very low market penetration, so in many cases their new 176L flash will also replace their 96L 3D NAND.
According to the report, Micron did not disclose more technical details of its 176L NAND. But for now, we know that their first 176L part is a 512Gbit TLC chip built using string stacking of two 88-layer platforms, and Micron now seems to be second only to Samsung in terms of how many layers of NAND flash cells can be manufactured.
The report further pointed out that after replacing the gate design with a charge trap cell design, Micron seems to have greatly reduced the thickness of each layer of flash memory. Data shows that the thickness of the 176L die is only 45μm, and the total thickness is the same as Micron's 64L floating gate 3D NAND.
A 16-die stacked package is less than 1.5mm thick, which is suitable for most mobile and memory card use scenarios. As with the previous generation of Micron 3D NAND, most of the chip's peripheral logic is manufactured under the NAND memory cell stack, a technology Micron calls "CMOS under Array" (CuA). This helps Micron bring some of the smallest die sizes, and Micron estimates that their 176L 512Gbit die is about 30% smaller than the best die currently offered by its competitors.
From the report, we can also see that Micron's 176L NAND supports an interface speed of 1600MT/s, which is higher than the 1200MT/s of its 96L and 128L flash memory. It is 33% higher than other solutions. In terms of capacity, the 176-layer die can hold 20-30 hours of 1920x1080p video.
Compared with 96L NAND, read (write) latency has improved by more than 35%, and compared with 128L NAND, it has improved by more than 25%. Compared with UFS 3.1 modules using 96L NAND, Micron Technology has achieved an overall mixed workload improvement of about 15%.
Micron's 176L 3D NAND is currently manufactured in its Singapore fab and has already started volume production, and is already shipping in some Crucial-branded consumer SSD products. However, Micron has not yet stated which specific Crucial products are now using the 176L NAND (or its 128L NAND, for that matter), so we expect this to be a fairly low-volume product at this time.
Nonetheless, over the next year we should see Micron's 176L NAND production ramp up to higher levels than what its 128L process was able to achieve, and we can expect a wide variety of products based on this 176L NAND to be released, replacing most of the products using its 96L NAND.
Micron said that the company's 176-layer NAND is a milestone for several reasons. On the one hand, the density of the technology is nearly 10 times that of earlier 3D NAND designs, which means that smartphones can do more and store more things; secondly, the price is even lower for more people, thus improving their daily lives.
They further support that this new 176-layer device is not only more dense than previous devices, but also incorporates the industry's highest data transfer rate through innovative circuit design. Micron engineers designed and built this ultra-high-density storage while making significant architectural changes to NAND that will enable innovation in downstream devices for years to come.
*Disclaimer: This article is originally written by the author. The content of the article is the author's personal opinion. Semiconductor Industry Observer reprints it only to convey a different point of view. It does not mean that Semiconductor Industry Observer agrees or supports this point of view. If you have any objections, please contact Semiconductor Industry Observer.
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