AM85C30-16JC datasheet, PDF - EEWORLD Datasheet

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AM85C30-16JC: Description2 CHANNEL(S), 2.048M bps, SERIAL COMM CONTROLLER, PQCC44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size395KB，68 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AM85C30-16JC Overview

2 CHANNEL(S), 2.048M bps, SERIAL COMM CONTROLLER, PQCC44

AM85C30-16JC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	unknow
Other features	10 X 19 FRAME STATUS FIFO
Address bus width
boundary scan	NO
Bus compatibility	8080; Z80; 6800; 68000; 80188; 80186; 80286; MULTIBUS
maximum clock frequency	16.384 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC; ADCCP
Data encoding/decoding methods	NRZ; NRZI-SPACE; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.512 MBps
External data bus width	8
JESD-30 code	S-PQCC-J44
length	16.5862 mm
low power mode	NO
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	44
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.57 mm
Maximum slew rate	22 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	16.5862 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

AM85C30-16JC Preview

FINAL

Am85C30

Enhanced Serial Communications Controller

DISTINCTIVE CHARACTERISTICS

Fastest data rate of any Am8530

— 8.192 MHz / 2.048 Mb/s

— 10 MHz / 2.5 Mb/s

— 16.384 MHz / 4.096 Mb/s

Low-power CMOS technology

Pin and function compatible with other NMOS

and CMOS 8530s

Easily interfaced with most CPUs

— Compatible with non-multiplexed bus

Many enhancements over NMOS Am8530H

— Allows Am85C30 to be used more effectively in

high-speed applications

— Improves interface capabilities

Two independent full-duplex serial channels

Asynchronous mode features

— Programmable stop bits, clock factor, character

length and parity

— Break detection/generation

— Error detection for framing, overrun, and parity

Synchronous mode features

— Supports IBM

BISYNC, SDLC, SDLC Loop,

HDLC, and ADCCP Protocols

Advanced

Micro

Devices

— Programmable CRC generators and checkers

— SDLC/HDLC support includes frame control,

zero insertion and deletion, abort, and residue

handling

Enhanced SCC functions support high-speed

frame reception using DMA

14-bit byte counter

19 SDLC/HDLC Frame Status FIFO

Independent Control on both channels

Enhanced operation does not allow special

receive conditions to lock the 3-byte DATA

FIFO when the 10

19 FIFO is enabled

Local Loopback and Auto Echo modes

Internal or external character synchronization

2-Mb/s FM encoding transmit and receive

capability using internal DPLL for 16.384-MHz

product

Internal synchronization between RxC to PCLK

and TxC to PCLK

— This allows the user to eliminate external syn-

chronization hardware required by the NMOS

device when transmitting or receiving data at

the maximum rate of 1/4 PCLK frequency

—

GENERAL DESCRIPTION

AMD’s Am85C30 is an enhanced pin-compatible ver-

sion of the popular Am8530H Serial Communications

Controller. The Enhanced Serial Communications

Controller (ESCC) is a high-speed, low-power, multi-

protocol communications peripheral designed for use

with 8- and 16-bit microprocessors. It has two independ-

ent,full-duplex channels and functions as a serial-to-

parallel, parallel-to-serial converter/controller. AMD’s

proprietary enhancements make the Am85C30 easier

to interface and more effective in high-speed applica-

tions due to a reduction in software burden and the elimi-

nation of the need for some external glue logic.

The Am85C30 is easy to use due to a variety of sophisti-

cated internal functions, including on-chip baud rate

generators, digital phase-locked loops, and crystal

oscillators, which dramatically reduce the need for ex-

ternal logic. The device can generate and check CRC

codes in any SYNC mode, and can be programmed to

check data integrity in various modes. The ESCC also

has facilities for modem controls in both channels. In ap-

plications where these controls are not needed, the mo-

dem controls can be used for general-purpose I/O.

This versatile device supports virtually any serial data

transfer application such as networks, modems, cas-

settes, and tape drivers. The ESCC is designed for non-

multiplexed buses and is easily interfaced with most

CPUs, such as 80188, 80186, 80286, 8080, Z80, 6800,

68000 and MULTIBUS™.

Publication#

10216

Rev.

Issue Date:

June 1993

Amendment

AMD

Enhancements that allow the Am85C30 to be used

more effectively in high-speed applications include:

A 10

19 bit SDLC/HDLC frame status FIFO array

A 14-bit SDLC/HDLC frame byte counter

Automatic SDLC/HDLC opening frame flag

transmission

TxD pin forced High in SDLC NRZI mode after

closing flag

Automatic SDLC/HDLC Tx underrun/EOM flag

reset

Automatic SDLC/HDLC Tx CRC generator reset/

preset

RTS

synchronization to closing SDLC/HDLC flag

DTR/REQ

deactivation delay significantly reduced

External PCLK to

RxC

TxC

synchronization

requirement eliminated for PCLK divide-by-four

operation

Other enhancements to improve the Am85C30 inter-

face capabilities include:

Write data valid setup time to falling edge of

requirement eliminated

Reduced

INT

response time

Reduced access recovery time (t

) to 3 PCLK

best case (3 1/2 PCLK worst case)

Improved

Wait

timing

Write Registers WR3, WR4, WR5, and WR10

made readable

Lower priority interrupt masking without

INTACK

Complete SDLC/HDLC CRC character reception

BLOCK DIAGRAM

TxDA

Transmitter

Receiver

RxDA

RTxCA

TRxCA

Internal

Control

Logic

Channel

Registers

10×19 Bit

Frame

Status

FIFO

Control

Logic

Internal Bus

Channel A

DTR/REQA

SYNCA

W/REQA

RTSA

CTSA

DCDA

TxDB

RxDB

RTxCB

TRxCB

Channel B

+5 V GND PCLK

DTR/REQB

SYNCB

W/REQB

RTSB

CTSB

DCDB

10216F-1

Baud

Rate

Generator

Data

Control

CPU

Bus VO

Interrupt

Control Lines

Interrupt

Control

Logic

Channel

Registers

RELATED AMD PRODUCTS

Part No.

Am7960

80186

80286, 80C286

Description

Coded Data Transceiver

Highly Integrated 16-Bit

Microprocessor

High-Performance 16-Bit

Microprocessor

Part No.

Am9517A

5380, 53C80

80188

Am386

Description

DMA Controller

SCSI Bus Controller

Highly Integrated 8-Bit

Microprocessor

High-Performance 32-Bit

Microprocessor

Am85C30

AMD

CONNECTION DIAGRAMS

Top View

DIP

INT

IEO

IEI

INTACK

+5 V

W/REQA

SYNCA

RTxCA

RxDA

TRxCA

TxDA

DTR/REQA

RTSA

CTSA

DCDA

PCLK

•

Am85C30

INT

A/B

D/C

GND

W/REQB

SYNCB

RTxCB

RxDB

TRxCB

TxDB

DTR/REQB

RTSB

CTSB

DCDB

10216F-2

PLCC, LCC

IEO

IEI

INTACK

+5 V

W/REQA

SYNCA

RTxCA

RxDA

TRxCA

TxDA

5 4

3 2

1 44 43 42 41 40

A/B

D/C

GND

W/REQB

SYNCB

RTxCB

RxDB

TRxCB

TxDB

18 19 20 21 22 23 24 25 26 27 28

PCLK

DCDB

CTSB

CTSA

DCDA

RTSB

DTR/REQA

DTR/REQB

RTSA

Note:

Pin 1 is marked for orientation.

10216F-3

LOGIC SYMBOL

Data

Bus

Bus Timing

and Reset

–D

A/B

Control

D/C

TxDA

RxDA

TRxCA

RTxCA

SYNCA

W/REQA

DTR/REQA

RTSA

CTSA

DCDA

TxDB

RxDB

TRxCB

RTxCB

SYNCB

W/REQB

DTR/REQB

RTSB

CTSB

DCDB

Serial

Data

Channel

Clocks

Channel

Controls

for

Modem,

DMA, or

Other

Interrupt

INT

INTACK

IEI

IE0

Serial

Data

Channel

Clocks

Channel

Controls

for

Modem,

DMA, or

Other

10216F-4

+5 V GND

PCLK

Am85C30

AMD

ORDERING INFORMATION

Commodity Products

AMD commodity products are available in several packages and operating ranges. The order number (Valid Combination) is

formed by a combination of:

AM85C30

-10

OPTIONAL PROCESSING

Blank = Standard Processing

TEMPERATURE RANGE

C = Commercial (0 to +70

PACKAGE TYPE

P = 40-Pin Plastic DIP (PD 040)

J = 44-Pin Plastic Leaded Chip Carrier (PL 044)

SPEED OPTION

-8 = 8.192 MHz

-10 = 10 MHz

-16 = 16.384 MHz

DEVICE NUMBER/DESCRIPTION

Am85C30

Enhanced Serial Communications Controller

Valid Combinations

AM85C30-8

AM85C30-10

AM85C30-16

PC, JC

Valid Combinations

Valid Combinations list configurations planned to

be supported in volume for this device. Consult

the local AMD sales office to confirm availability of

specific valid combinations and check on newly

released combinations.

Am85C30

AMD

ORDERING INFORMATION

Industrial Products

AMD industrial products are available in several packages and operating ranges. The order number (Valid Combination) is

formed by a combination of:

AM85C30

-10

OPTIONAL PROCESSING

Blank = Standard Processing

TEMPERATURE RANGE

I = Industrial (-40 to +85

PACKAGE TYPE

J = 44-Pin Leadless Chip Carrier (PL 044)

SPEED OPTION

-10 = 10 MHz

-16 = 16.384 MHz

DEVICE NUMBER/DESCRIPTION

Am85C30

Enhanced Serial Communications Controller

Valid Combinations

AM85C30-10

AM85C30-16

Valid Combinations

Valid Combinations list configurations planned to

be supported in volume for this device. Consult

the local AMD sales office to confirm availability of

specific valid combinations and check on newly

released combinations.

Am85C30

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