We have officially entered the Chiplet era!

Latest update time：2022-01-22

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Last November, AMD held its AMD Accelerated Datacenter premiere, Intel held their Innovation Day, and CNET's Stephen Shankland visited Intel's Fab 42 and CH-4 in Chandler.

AMD

At the premiere, AMD CEO Lisa Su introduced the new Milan-X, the third generation AMD EPYC processor with 3D V-cache.

It has eight Zen 3 CCDs with 6 x 6 mm 64 MB SRAM bonded to each CCD, so it's essentially the same SRAM chip we reported on after Computex earlier this year.

This adds 512MB of L3 cache to the part, for a total of 768MB, which, combined with the L2 cache, gives a total of 804MB.

AMD is clearly pleased with TSMC's SOIC hybrid bonding technology, as they are launching this highly anticipated new product with eight of these chips per device.

Later in the keynote, Forrest Norrod, SVP/GM of AMD’s Datacenter and Embedded Solutions Group, discussed the new AMD Instinct MI200 series accelerators. They contain two CDNA2 GPU dies with a total of 58 billion transistors, built on 6nm technology, with up to 8 HBM2E memory stacks, making them the world’s first GPUs with 128 GB of HBM2E. This caught our attention at 3D Packaging because they use the “Elevated Fanout Bridge”.

This is essentially a connector die, like Intel’s EMIB and TSMC’s InFO-LSI, but located on top of the substrate PCB rather than embedded in it.

AMD holds a patent for this type of structure (US 10,867,978).

This makes me tend to think that AMD will use an OSAT rather than TSMC to implement this technology. Coincidentally, SPIL (Siliconware Precision Industries Co., Ltd) announced at ECTC 2020 that they have a similar technology labeled "Fan-Out Embedded Bridge".

It uses the bridge precedence order to put assemblies together:

At SC21 a few weeks ago, AMD showed off an HPE Cray EX235a node that used the AMD Instinct MI250X, which was spotted by Patrick Kennedy of Serve The Home and published details, so we know that Instincts are at least being sampled by OEMs.

There's no sign of EFB, but presumably our view is obscured by the underfill.

Intel

There wasn’t actually much mention of packaging at the Intel event, although they did discuss the “Sapphire Rapids” (SPR) next-generation Xeon processors, which consist of four “tiles” connected to the EMIB die, with the option to add HBM.

As we can see, the SPR die is about 400mm2 ^, there are 10 EMIB dies connecting them, and another four for the four HBM stacks.

When Stephen Shankland visited Intel's CH4 packaging facility, he took a photo of the SPR substrate showing where the EMIB die is located.

We can see that each die has 5 EMIB points for compute tile interconnects, plus 1 for the HBM stack. He also shows us what the populated substrate looks like:

For some time now, Intel has been promoting their Ponte Vecchio (PVC) high-end GPU, which makes heavy use of Foveros die stacking and EMIB interconnects.

The compute tile is made using TSMC N5, the Xe Link tile is made using TSMC N7, and the base tile is made using Intel 7. Ravi Mahajan gave some packaging details at the Hot Chips 33 conference, including the die size of the base tile and the first crossbar - the part I've seen.

CNET also saw a board consisting of four assembled PVC parts:

Both AMD Instinct and Ponte Vecchio are power-hungry beasts and use the Open Compute Project's OCP Accelerator Modules (OAMs), which are designed to handle up to 700W of power.

Thanks to Stephen Shankland, we now have an idea of what the upcoming Meteor Lake CPUs will look like; he saw test parts being assembled to evaluate the Foveros stack using a reduced 36-micron bump pitch.

We see four chips there, so presumably one is a filter filler, as Meteor Lake is made up of discrete compute, GPU, and low-power SoC tiles. Pat Gelsinger said on the Q3 conference call that while one or more tiles come from the foundry, the compute tile is made in an Intel 4 process (formerly 7nm) and is running:

“On Intel 4, we have already taped out the compute block for Meteor Lake, which will come out of the fab this quarter and boot up in 30 minutes with excellent performance, which is exactly what we expected. All in all, this is one of the best lead generation product startups we have seen in recent memory, which speaks to the health of the process.”

I think we can clearly say that we are now in the era of chiplets!

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