34 Most Important Questions You Should Know When Doing DSP Development

1. What is DSP? (Default)
2. What are the main differences between DSP C language and host C language?
1) DSP C language is standard ANSI
C, which does not include the extended part that connects with peripherals, such as screen drawing. But in CCS, in order to facilitate debugging, data can be virtually output to the host screen through the prinf command.
2) The compilation process of DSP C language is that C is compiled into ASM, and then ASM is compiled into OBJ. Therefore, the correspondence between C and ASM is very clear, which is very convenient for manual optimization.
3) DSP code needs absolute positioning; host C code has operating system positioning.
4) DSP C is more efficient and very suitable for embedded systems.
3. DSP development trends
1. TMS320C2000
TMS320C2000 series includes C24x and C28x series. C24x series recommends using LF24xx series to replace C24x series. The price of LF24xx series is cheaper than C24x, the performance is higher than C24x, and LF24xxA has encryption function.
The C28x series is mainly used for large storage device management and high-performance control occasions.
2.TMS320C3x
The TMS320C3x series includes C3x and VC33, and VC33 is mainly recommended. The C3x series is the basis of TI's floating-point DSP and is unlikely to be discontinued, but the price will not be further reduced.
3.TMS320C5x The TMS320C5x series is no longer recommended for use. It is recommended to use the C24x or C5000 series instead.
4.TMS320C5000 The TMS320C5000 series includes the C54x and C55x series.
Among them, new devices of VC54xx continue to appear, such as: TMS320VC5471 (DSP + ARM7).
The C55x series is TI's third-generation DSP, with power consumption of 1/6 of VC54xx and performance of 5 times that of VC54xx. It is a developing series.
The C5000 series is the mainstream DSP of TI DSP at present. It covers the application fields from low-end to medium-high-end, and is also the series with the most users.
5. TMS320C6000 The TMS320C6000 series includes C62xx, C67xx and C64xx. This series is TI's high-end DSP series.
Among them, the C62xx series is a fixed-point DSP, with a rich variety of series chips, and is the main application series.
The C67xx series is a floating-point DSP, which is used in fields that require high-speed floating-point processing. The C64xx series is a new development, and its performance is 10 times that of the C62xx.
6. OMAP series
It is a chip specially used in the multimedia field by TI. It is C55+ARM9, with excellent performance, and is very suitable for multimedia applications such as handheld devices and Internet terminals. 4.
How to mix 5V/3.3V? The development of
TI
DSP is the same as the development of integrated circuits. New DSPs are all 3.3V, but there are still many peripheral circuits that are 5V. Therefore, in DSP systems, there are often problems of mixing 5V and 3.3V DSPs. In these systems, it should be noted that:
1) DSP outputs to 5V circuits (such as D/A) without adding any buffer circuits and can be directly connected.
2) DSP inputs 5V signals (such as A/D). Since the voltage of the input signal is >4V, it exceeds the power supply voltage of the DSP. The external signal of the DSP has no protection circuit and needs to be buffered, such as 74LVC245, to convert the 5V signal into a 3.3V signal.
3) The signal of the emulator's JTAG port must also be 3.3V, otherwise the DSP may be damaged.
V. Why is the DSP with large on-chip RAM more efficient?
At present, the on-chip RAM of DSP development is getting larger and larger. To design an efficient DSP system, you should choose a DSP with large on-chip RAM. Compared with external memory, on-chip RAM has the following advantages:
1) The speed of on-chip RAM is faster, which can ensure that the DSP runs without waiting.
2) For the C2000/C3x/C5000 series, some on-chip memories can be accessed twice in one instruction cycle, making the instructions more efficient.
3) The on-chip RAM runs stably and is not affected by external interference, nor will it interfere with the outside.
4) The DSP has multiple buses on the chip. When accessing the on-chip RAM, it will not affect the access of other buses, and the efficiency is high.
6. Why did DSP develop from 5V to 3.3V?
The development of ultra-large-scale integrated circuits has developed from 1um to the current 0.1um, and the power supply voltage of the chip has also decreased, and the power consumption has also decreased. DSP has also developed from 5V to the current 3.3V, and the core voltage has developed to 1V. At present, the peripherals of mainstream DSPs have all developed to 3.3V, and the price and power consumption of 5V DSPs are both high, and they are gradually being replaced by 3.3V DSPs.
String 1

7 How to choose the power chip for DSP?
TMS320LF24xx: TPS7333QD, 5V to 3.3V, maximum 500mA.
TMS320VC33: TPS73HD318PWP, 5V to 3.3V and 1.8V, maximum 750mA.
TMS320VC54xx: TPS73HD318PWP, 5V to 3.3V and 1.8V, maximum 750mA;
TPS73HD301PWP, 5V to 3.3V and adjustable, maximum 750mA.
TMS320VC55xx: TPS73HD301PWP, 5V to 3.3V and adjustable, maximum 750mA.
TMS320C6000: PT6931, TPS56000, maximum 3A.
8. How to use software wait?
The instruction cycle of DSP is fast, and waiting is required when accessing slow memory or peripherals. Waiting is divided into hardware waiting and software waiting, and the waiting of each series is not exactly the same.
1) For C2000 series: The hardware wait signal is READY, and there is no waiting when it is high.
The software wait is determined by the WSGR register, and up to 7 waits can be added. Among them, the program memory, data memory and I/O can be set separately.
2) For C3x series: The hardware wait signal is /RDY, and low level means no wait.
The software wait is determined by SWW and WTCNY in the bus control register. Up to 7 waits can be added, but the wait is not segmented and is valid in all spaces except within the chip.
3) For C5000 series: The hardware wait signal is READY, and high level means no wait.
Software wait is determined by SWWCR and SWWSR registers, and up to 14 waits can be added. Among them, program memory, control program memory, data memory and I/O can be set separately.
4) For C6000 series (limited to asynchronous memory or peripherals): The hardware wait signal is ARDY, and there is no wait when the high level.
Software wait is determined by the external memory interface control register. The timing of bus access to external memory or device can be set, which can facilitate synchronous and asynchronous memory or peripheral interface.
9. Why do interrupt vectors need to be relocated?
In order to facilitate the configuration of DSP memory, the interrupt vector of DSP can be relocated, that is, it can be placed anywhere in the memory space by setting registers.
Note: The interrupt vector of C2000 cannot be relocated.
10. Can the highest main frequency of DSP be obtained from the chip model?
The highest main frequency of TI's DSP can be obtained from the chip model, but it is not necessarily the same for each series.
1) TMS320C2000 series:
TMS320F206-highest main frequency 20MHz.
TMS320C203/C206-highest main frequency 40MHz.
TMS320F24x - Maximum frequency 20MHz.
TMS320LF24xx - Maximum frequency 30MHz.
TMS320LF24xxA - Maximum frequency 40MHz.
TMS320LF28xx - Maximum frequency 150MHz.
2)TMS320C3x series:
TMS320C30: Maximum frequency 25MHz.
TMS320C31PQL80: Maximum frequency 40MHz.
TMS320C32PCM60: Maximum frequency 30MHz.
TMS320VC33PGE150: Maximum frequency 75MHz.
3)TMS320C5000 series:
TMS320VC54xx: Maximum frequency 160MHz.
TMS320VC55xx: Maximum frequency 300MHz.
4)TMS320C6000 series:
TMS320C62xx: Maximum frequency 300MHz.
TMS320C67xx: Maximum main frequency 230MHz.
TMS320C64xx: Maximum main frequency 720MHz.