[Zhongke Haoxin HXS320F28025C] Haoxin HXS320F28034 digital signal processor CAN debugging

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[Zhongke Haoxin HXS320F28025C] Haoxin HXS320F28034 digital signal processor CAN debugging [Copy link]

 

Haoxin HXS320F28034 digital signal processor DSP, its CAN module uses Mailbox MBOXn to control and transmit data, realizing efficient sending and receiving of control instructions between DSPs, which can more effectively help engineers to achieve efficient sending and receiving of multi-DSP control instructions, and is widely used in high-complexity control fields such as electric vehicles, wind power generation, rail transportation, and robots.

This chapter uses the HX2000 series chip debugging USB_CAN communication transceiver example to explain the CAN network communication function.

The principle of the HX2000 series CAN module is as shown in the figure below. It enters the initialization configuration mode by enabling CANMC[CCR], waits for CANMC[CCE] to be set high and writes the CANBTC bit to configure the baud rate; waits for CANMC[CCE] to be pulled low to complete the initialization;

int main(void)

{

InitSysCtrl(); //System clock initialization

CAN_Init(); //CAN initialization parameter configuration

InitECanaGpio(); //CAN Gpio pin configuration

EALLOW;

ECanaRegs.CANMIM.bit.MIM0=1; //Open the receiving mask and trigger an interrupt when data is received

ECanaRegs.CANMIL.bit.MIL0 = 0; // Select EcanA interrupt 0

ECanaRegs.CANGIM.bit.I0EN = 1; // Enable interrupt 0

PieVectTable.ECAN0INTA = &eCanRxIsr; // CANA 0 receive interrupt entry

EDIS;

PieCtrlRegs.PIEIER9.bit.INTx5 = 1; // Enable ECAN1 interrupt

IER |= M_INT9; // Enable CPU INT9

ONE;

while(1){

CAN_Tx(); //Send data

}

return 0;

}

Among them, the initialization parameter configuration code of CAN is:

void CAN_Init()

{

volatile struct ECAN_REGS ECanaShadow;

EALLOW;

/* Configure RX and TX pins */

ECanaShadow.CANTIOC.all = P_ECanaRegs->CANTIOC.all;

ECanaShadow.CANTIOC.bit.TXFUNC = 1;

P_ECanaRegs->CANTIOC.all = ECanaShadow.CANTIOC.all;

ECanaShadow.CANRIOC.all = P_ECanaRegs->CANRIOC.all;

ECanaShadow.CANRIOC.bit.RXFUNC = 1;

P_ECanaRegs->CANRIOC.all = ECanaShadow.CANRIOC.all;

/* Clear RMPn, GIFn bits*/

P_ECanaRegs->CANRMP.all = 0xFFFFFFFF;

/* Clear interrupt flag */

P_ECanaRegs->CANGIF0.all = 0xFFFFFFFF;

P_ECanaRegs->CANGIF1.all = 0xFFFFFFFF;

/* Initialize configuration, write CAN baud rate*/

ECanaShadow.CANMC.all = P_ECanaRegs->CANMC.all;

ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1

P_ECanaRegs->CANMC.all = ECanaShadow.CANMC.all;

ECanaShadow.CANES.all = P_ECanaRegs->CANES.all;

do

{

ECanaShadow.CANES.all = P_ECanaRegs->CANES.all;

} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..

//Bit rate=SYSCLKOUT/2/{(BRP+1)*[(TSEG1+1)+(TSEG2+1)+1，

//TSEG1≥3,TSEG2≥2

ECanaShadow.CANBTC.bit.BRPREG = 2;

ECanaShadow.CANBTC.bit.TSEG2REG = 4;

ECanaShadow.CANBTC.bit.TSEG1REG = 13;

P_ECanaRegs->CANBTC.all = ECanaShadow.CANBTC.all;

ECanaShadow.CANMC.all = P_ECanaRegs->CANMC.all;

ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0

P_ECanaRegs->CANMC.all = ECanaShadow.CANMC.all;

ECanaShadow.CANES.all = P_ECanaRegs->CANES.all;

do

{

ECanaShadow.CANES.all = P_ECanaRegs->CANES.all;

} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..

/* Mask all mailbox registers */

// Required before writing the MSGIDs

P_ECanaRegs->CANME.all = 0;

/* Configure MBOX1's MSGID*/

P_ECanaMboxes->MBOX1.MSGID.all = 0x00040000;

P_ECanaMboxes->MBOX0.MSGID.all = 0x00040000;

/* Configure the transmission byte of MBOX1/MBOX0 to 2 */

ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 0x2;

ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 0x2;

/* Configure MBOX0 to receive and MBOX1 to send*/

ECanaRegs.CANMD.bit.MD0=1;

ECanaRegs.CANMD.bit.MD1=0;

/* Enable MBOX0 and MBOX1 */

ECanaRegs.CANME.bit.ME0=1;

ECanaRegs.CANME.bit.ME1=1;

//Suspend the receiving mailbox to trigger the receiving interrupt

if(ECanaRegs.CANRMP.bit.RMP0==0)

{

ECanaRegs.CANRMP.bit.RMP0=1;

}

EDIS;

return;

}

The remote transmission request is configured through the RTR bit of the Mailbox mailbox MBOXn.MSGCTRL, the MBOXn transmission priority is configured through the TPL bit, and the DLC bit is configured to transmit 0~8 bytes. The transmission process is as follows:

1. The CAN bus sends data to the CAN through the CAN transmission chip, enables CANRIOC[RXFUNC] to open the receiving line, receives data from the CANRX receiving pin defined by GPIOMUX, and loads it into the Receive Buffer;

2. Configure the mailbox MBOXn to receive through CANMD[MDn], enable CANME[MEn] to open the mailbox MBOXn, and receive the data from the buffer;

1. The setting of the global interrupt flag depends on the setting of the GIL bit in the CANGIM register. If this bit is set, the global interrupt is set in the CANGIF1 register; otherwise, it is set in the CANGIF0 register. Configure the receive mask interrupt enable through CANMIM[MIMn]; configure the MBOXn receive interrupt to the interrupt ECAN0INTA or ECAN1INTA through CANMIL[MILn]; enable CANGIM[I0EN/I1EN] to turn on the interrupt signal, and when MBOXn receives data, a receive interrupt will be generated, setting the mailbox number of the corresponding receive mailbox MBOXn in CANGIF0/1[MIV0/1]; respond to the CPU to execute the receive interrupt program through PIE:

EEWORLDIMGTK0

(1) Set CANRMP[RMPn] to suspend the MBOXn mailbox to prevent multiple sets of data from being received instantly;

(2) Through CANGIF0/1[MIV0/1], confirm that the received data mailbox is MBOXn, and read the received data;

1. Setting CANRMP[RMPn] clears the pending state of mailbox MBOXn and prepares to receive the next set of data.

The sending program code of CAN is:

void CAN_Tx(void)

{

//Wait for MBOX0 to receive successfully and read the message

while(ECanaRegs.CANRMP.bit.RMP0!=1){}

ECanaMboxes.MBOX1.MDL.byte.BYTE0 = (receive_data&0xff);

ECanaMboxes.MBOX1.MDL.byte.BYTE1 = ((receive_data>>8)&0xff);

ECanaRegs.CANTRS.bit.TRS1 = 1; //Send MBOX1 data to MBOX0

} Author: Zhongke Haoxin https://www.bilibili.com/read/cv18742715/?spm_id_from=333.999.0.0 Source: bilibili

EEWORLDIMGTK1

4. Configure another mailbox MBOXn for sending through CANMD[MDn], enable CANME[MEn] to open the sending mailbox, enable CANTRS[TRSn] to start the sending mailbox, and send data to the buffer Transmit Buffer;

5. Enable CANTIOC[TXFUNC] to open the transmit line and send the buffer Transmit Buffer data to the CAN bus through the CANTX transmit pin defined by GPIOMUX.