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Japan will cooperate with the United States to mass-produce 2nm chips as early as 2025

Latest update time:2022-06-16
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Japan will join the race to commercialize next-generation chip technology in cooperation with the United States to launch a domestic 2-nanometer semiconductor manufacturing base as early as fiscal 2025, according to Nikkei. Tokyo and Washington will provide support under the bilateral chip technology partnership. Private companies in both countries will conduct design and mass production research.

Screenshot of the Nikkei Asian Review report

TSMC is leading the way in developing mass production technology for 2-nanometer chips. Japan is seeking a stable supply of semiconductors by achieving domestic production of next-generation chips.

Japanese and American companies could jointly form a new company, or a Japanese company could build a new manufacturing center. Japan's Ministry of Economy, Trade and Industry would partially subsidize research and development costs and capital expenditures.

Joint research will begin as early as this summer, and a research and mass production center will be formed between fiscal 2025 and 2027.

TSMC, the world's largest contract chipmaker, is building a chip factory in Kumamoto Prefecture, Japan, but the plant will only produce less advanced semiconductors in the 10nm to 20nm range.

Smaller semiconductors enable miniaturization and improved performance of devices. 2-nanometer chips will be used in products such as quantum computers, data centers and cutting-edge smartphones. These chips also reduce power consumption and reduce carbon footprint.

Size can also determine the performance of military hardware, including fighter jets and missiles. Given this, 2nm chips are directly related to national security.

In early May, Japan and the United States signed the Basic Principles of Semiconductor Cooperation. The two sides will discuss the details of the cooperation framework at the upcoming "two plus two" cabinet economic officials meeting.

Prime Minister Fumio Kishida's "new capitalism" agenda, approved by the cabinet last week, outlines the formation of a design and manufacturing base this decade through bilateral public-private partnerships with the United States.

IBM, which has strong capabilities in 2-nanometer R&D, developed a prototype last year. Intel, also an American company, is also conducting R&D on 2-nanometer processes.

In Japan, a collaboration is underway at a research laboratory in Tsukuba City, operated by the National Institute of Advanced Industrial Science and Technology, to develop manufacturing technologies for advanced semiconductor production lines, including production technologies for 2-nanometer processes. Chip-making equipment makers such as Tokyo Electron and Canon are participating in the collective along with IBM, Intel and TSMC.

Japan has strong chip material manufacturers such as Shin-Etsu Chemical and Sumco, while the United States has chip manufacturing equipment giant Applied Materials Inc. This collaboration between chipmakers and major suppliers is aimed at making mass production technology for 2-nanometer chips within reach.

TSMC is at the forefront of mass production of next-generation chips. The company expects to break ground on a 2-nanometer manufacturing facility this year and is expected to begin mass manufacturing of 3-nanometer chips later this year.

Japan’s 2nm ambitions

In May last year, foreign media reported that the Japanese government was seeking to attract outstanding foreign chip manufacturers to build wafer factories in Japan to promote the development of Japan's semiconductor industry. TSMC later made a decision, although it was a 28nm process, it was also a good start.

Media reports in January this year also pointed out that TSMC will establish a joint venture with the Ministry of Economy, Trade and Industry of Japan to set up an advanced packaging and testing plant in Tokyo. According to the Nikkan Kogyo Shimbun, TSMC will set up a new technology R&D center in Tsukuba City, Ibaraki Prefecture, Japan. The R&D center includes wafer processing and 3D packaging. Judging from past reports, Japan's decision also has its own considerations.

Because of the limitation of transistor miniaturization, there has been a view in the industry for many years that advanced packaging can continue to promote the improvement of chip performance. In September last year, TSMC launched its 3D Fabric platform, which includes SoIC, CoWoS, InFO and other technology families, which can connect high-bandwidth storage, heterogeneous integration and 3D stacking in series to improve system energy consumption and reduce area. TSMC R&D Vice President Yu Zhenhua also used TSMC's SoIC technology as an example to talk about the advantages of their platform. He pointed out that this technology can stack low-temperature multi-layer storage on logic chips to help extend Moore's Law. The company has now successfully stacked 4-layer, 8-layer and 12-layer low-temperature multi-layer memory on logic chips, and the total thickness of the 12 layers is less than 600 microns, which allows the company to stack more layers in the future.

Although Japan has already clung to TSMC and made some preparations for the future development of advanced chip manufacturing, according to recent news, Japan's ambitions do not stop there.

The latest report from Nikkei News pointed out that the Ministry of Economy, Trade and Industry of Japan will hold a review meeting related to Japan's semiconductor industry as early as this week. In addition to exploring the impact of the fire at the Renesas Electronics factory on automobile production and the hidden concerns of instability in the automobile industry's supply chain, the Japanese government also plans to focus on the current economy moving towards digitalization, make the semiconductor supply chain more resilient, and re-formulate medium- and long-term policies from the perspective of economic security.

Nikkei further pointed out that the Japanese government will provide financial support to assist Japanese companies in developing next-generation semiconductor manufacturing technology beyond 2nm. To achieve this goal, in addition to continuing to maintain a wide range of exchanges with semiconductor giants such as TSMC and Intel to conduct research and development, they will also work with local equipment giants such as Canon, Tepco, and SCREEN to revitalize Japan's strength in advanced research and development.

It is reported that this research and development team, which has received financial support from the Ministry of Economy, Trade and Industry, aims to establish the manufacturing technology for next-generation semiconductors beyond 2nm by the mid-2020s, set up a test production line, and develop manufacturing technologies such as processing and cleaning of fine circuits.


The confidence of accumulated strength

As mentioned at the beginning of the article, although Japan does not have advanced wafer fabs, they have a very important layout in the upstream of advanced processes. Take the hot EUV lithography as an example. Although everyone knows that the Dutch company ASML can currently provide the leading EUV lithography machine in the world, in previous reports of Semiconductor Industry Observer, we can see the strength of Japanese companies in multiple links in this field.


First, let's look at defect detection equipment. If there are defects in the photomask used as the original circuit board, the defect rate of the semiconductor will increase accordingly. In recent years, the demand for EUV mask (photomask and mask for semiconductor circuits) inspection equipment has been particularly strong. In this field, Japan's Lasertec Corp. is the world's only tester manufacturer, and Lasertec holds a 100% share of the global market.

Another Japanese company that has a 100% market share is Tokyo Electron's EUV coating and developing equipment, which is used to apply special chemical liquids to silicon wafers for developing semiconductor materials. In 1993, Tokyo Electron began selling FPD production equipment coaters/developers, and in 2000, it delivered 1,000 coaters/developers "CLEAN TRACK ACT 8".

In terms of EUV photoresist, Japan's market share is far ahead. According to a related report released by Nanjing University of Science and Technology in March this year, as shown in the figure below, only Japanese manufacturers in the world have developed EUV photoresist, which shows their strength in this regard. To learn more about Japan's strength in EUV, you can refer to the previous article "Japan's EUV Strength That Cannot Be Ignored" by Semiconductor Industry Observer .

Industrialization progress of semiconductor photoresist products by major international manufacturers (source: Nanjing University of Science and Technology)

In terms of advanced process research and development, there is another important link, which is the EUV lithography machine mentioned at the beginning of this section. This is also the reason why Japan has included Canon in advanced process research and development. Although this former lithography machine giant has been left behind by ASML in this field, their accumulation in lithography can provide guidance for Japan's advanced manufacturing to some extent.


In addition to the technologies and companies mentioned above, as shown in the figure above, Nikkei also disclosed in yesterday's report that Japan is involved in many aspects of semiconductor manufacturing. This shows that Japan has a strong foundation to make some waves in chip manufacturing. At the same time, the super performance of Fujitsu's 48-core Arm chip A64FX on Japan's Fugaku "supercomputer" and the news of Socionext's 5nm chip show that Japan also has its strength in advanced chips.

With the cooperation of these companies, I believe that Japan has the potential to revive advanced semiconductor chip technology and even build advanced process wafer fabs. Of course, whether it will really do so is another level of discussion.

Japan needs $88 billion to revive semiconductor industry, government consultant says

TSMC's decision to build a factory in Japan and receive subsidies from the Japanese government is seen as the key to Japan's improvement of its chip manufacturing capabilities. According to foreign media reports, a senior adviser to the Japanese government's semiconductor group believes that Japan has not done enough. If it wants to revive the semiconductor industry, it should provide tax breaks next year and set a target of encouraging companies to invest up to 10 trillion yen (about US$88 billion) over the next decade.

Tetsuro Azuma believes that Japan's semiconductor industry has been in a slump for decades, and the move to increase subsidies should be the beginning of a reversal of the downward trend. "Without the government's initial investment, private companies will not be willing to invest."

Tetsuro Azuma suggested that the Japanese government and private sector should invest 10 trillion yen in the semiconductor industry in the next 10 years. At present, there is a consensus in Japanese political circles to increase subsidies for the semiconductor industry. According to reports, Japanese Prime Minister Fumio Kishida has also stated that he will provide more than 1.4 trillion yen in investment for domestic semiconductor production.

The report mentioned that due to the chip shortage, countries are expanding their chip manufacturing capabilities and increasing subsidies. The United States has invested US$52 billion (approximately NT$1.44 trillion) and successfully attracted TSMC and Samsung to set up factories in the United States. China has also taken related actions.

The report mentioned that Japan was criticized in the past for insufficient investment in the semiconductor industry, which resulted in the loss of market share. Now the Japanese government has re-emphasized the semiconductor industry and promised to make the revitalization of the semiconductor industry a national project, with the goal of increasing the annual revenue of domestic semiconductor companies by about three times to 13 trillion yen (about 1,100 US dollars) by 2030.

Tetsuro Azuma believes that in the next step, the Japanese government should allocate additional funds for chip manufacturing in the regular budget instead of using a one-time budget to help. He believes that people need to see a long-term commitment to this project, otherwise they will not take the government seriously. "Without the initial investment of the government, private enterprises will not be willing to invest."

As for what items should be covered by the Japanese government's tax cuts for the semiconductor industry, Tetsuro Azuma believes that these should include: exempting chip manufacturing industry from corporate income tax on research and development, and reducing water and utility costs, which are all areas worth discussing.

Source: Semiconductor Industry Observer



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