[Perf-V Review] First Look at the Perf-V Development Board

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[Perf-V Review] First Look at the Perf-V Development Board [Copy link]

2.1 Introduction to the Perf-V Development Board2.1.1
Unboxing the Perf-V Development Board
The version I bought is the Perf-V Development Board Basic Version. Let’s get straight to the point. See the figure below for the unboxing process

Fig 1 Unboxing diagram of the Perf-V Development Board Basic Version (5V power supply not photographed)
Note: The Perf-V Development Board Basic Version has four components:
(1) Perf-V Development Board
(2) USB Data Cable (TYPE A interface to Micro B interface)
(3) FPGA USB Cable
(4) 5V power supply (not fully photographed in the above figure)
2.1.2 Schematic diagram of the Perf-V Development Board

Fig 2 Schematic diagram of the Perf-V Development Board onboard resources2.1.2.1
Power Management
Perf-V The development board has a 5V power input, most of the interface voltage is 3.3V, the auxiliary voltage is 1.8V, the DDR voltage is 1.5V, and the FPGA core voltage is 1.0V.
The power supply has a power-on sequence of 5.0V->1.0V->1.8V->1.5V/3.3V.
2.1.2.2 Clock Source
The clock source of the Perf-V development board uses an external active crystal oscillator circuit: 50MHz.
2.1.2.3 Perf-V Development Board I/O
The Perf-V development board contains 9 LEDs, 9 buttons, and 2 pairs of differential AD inputs.
2.1.2.4 DDR3 and Flash
The Perf-V development board contains a DDR3 SDRAM, 256Mbyte.
The Perf-V development board contains two Flash, each 8Mbyte.
2.1.2.5 Extension Interface
The Perf-V development board has three user extension interfaces: P1, P2, and JP1.
2.1.3 Getting to know
the Perf-V development board The core processing chip uses the Xilinx Artix-7 FPGA chip XC7A35T1FTG256C. The XC7A35T1FTG256C chip has a total of 33280 logic units, configurable logic blocks: 400Kb, Block RAM: 1800Kb, available IO number: 210, clock unit: 5.
The basic version of the Perf-V development board was developed by Pengfeng Technology (PerfXLab) in 2018. The developer provides a complete debugging environment (which can run on Linux and Windows) and is equipped with a complete Demo program. This is user-friendly and easy to use and redevelop.
My role this time is testing, and I will start with interface testing in the early stage. Application design will be added later, with function and performance as the orientation. The Perf-V development board can port the WildFire RISC-V architecture and soft core, hoping to create sparks.

梦溪开物

I would like to ask, why is there a DDR3 chip next to every FPGA development board, and what function does it play?

freebsder

Looking forward to playing with RISC-V