[Perf-V Evaluation] Development Board Circuit Analysis and Xilinx Software Trial

cruelfox

[Perf-V Evaluation] Development Board Circuit Analysis and Xilinx Software Trial [Copy link]

　　First of all, I would like to thank Pengfeng Technology for providing the Perf-V development board. This is a board that is different from the regular FPGA development board. It is not like many development boards that are equipped with many fancy peripheral devices to provide experimental convenience, nor is it like a streamlined board that directly makes the I/O ports into rows of pinholes. Instead, it actually arranges a set of Arduino interfaces - meaning: I can use it like an MCU development board.

It is actually a size larger than the Arduino style board. Because the FPGA minimum system has many more peripheral devices than an MCU, the two standard size JTAG sockets are relatively large, and some LEDs, buttons, and switches are placed on the outer circle (after all, it is an FPGA development board, and it is better to have support for basic experiments), so it is this size. I also think it is not impossible to make it more compact and smaller, but the cost will increase, so it is not necessary.

　　The board configuration, in my opinion, is just based on the Xilinx Artix-7 minimum system with some peripheral devices (DDR3 SDRAM and flash) and interfaces added. In the photo above, I marked the power supply with a red frame. There are four DC-DCs to power the FPGA and SDRAM, which are 3.3V/1.8V/1.5V/1.0V. DDR3 also uses a 0.75V voltage generated by LDO. Two serial flashes (N25Q64), one for FPGA power-up configuration and one for free use. The rest are simple switches and LED connections.

　　FPGA is a BGA 256-pin package with many I/O ports. In addition to a few general I/O ports led out by the Arduino port and PMOD port, there is also a small 60-pin connector on the back of the board for connecting expansion cards. For example, it can be expanded to include an SD card holder, HDMI interface, VGA interface, etc. This expansion card design allows the core board to remain small in size and can be connected only when needed; on the other hand, it also saves the cost of the development board.

　　The Perf-V document provides a complete circuit diagram, which can be used as a reference for learning and designing Xilinx Artix-7 series FPGA system boards.

　　In addition to the 3.3V and 1.5V I/O voltages, this FPGA has a core voltage of 1.0V and uses 1.8V for VCCAUX. In addition, 1.0V is also used for VCCBRAM and VCCADC (this FPGA has an on-chip ADC).

There are two types of I/O voltages: 3.3V and 1.5V. This is because DDR3 SDRAM uses 1.5V, and general I/O uses 3.3V. FPGA boards are more difficult to DIY than MCUs, mainly because there are many power pins and multiple sets of different voltages are required. Most packages are BGA, and the cost of making PCBs is high, so it is often most convenient to directly purchase the smallest system board for prototype development.

　　Xilinx FPGA software development tools include ISE and Vivado. This time I tried Vivado 2017.4 Linux version, downloaded from the Xilinx website. The software package is already very large, so there is no need to pursue the latest version.

　　Make a simple logic to test the process.

　　Create a project, specify the path, and select the FPGA device as XC7A100TFTG256 corresponding to Perf-V. Do not add any code, and then reach the main interface:

　　I want to write a counter to light up a lamp. The code is very simple (you can write it with any text editor and add it to the project):

module demo(clk, led);
input clk;
output [3:0] led;

reg [25:0] cnt;

always @(posedge clk)
    cnt <= cnt + 1'b1;

assign led = cnt[25:22];

endmodule

Then add the Verilog source file to the project in Vivado. Of course, you can also create and edit the file directly in Vivado.

Vivado will automatically recognize the modules defined in the file (maybe it will report syntax errors immediately, but I didn't try it). It will automatically set the top-level module of the project to the "demo" I wrote. Now we can proceed with synthesis.

　　Click "Run Synthesis" in the left column of the main window to start the synthesis tool. Then, just wait... Although the code is very simple, this step takes a long time...

　　Finally, the synthesis is finished. You can click "Open Synthesized Design" to see the results:

The synthesized logic can be viewed graphically, like this:

　　The next step is "Run Implementation", which is to use FPGA to implement the above logic. The operation method is similar.

Looking at the results of the implementation, there are serious warnings!

　　The reason is that I have not processed the pins, and they are still in the default settings. Because the software does not know how the chip pins are connected, what the voltage standard is, etc., the user needs to specify it first. I have not yet assigned which pins the LEDs are connected to, and even if I have done it now, it will not work correctly. Now you need to select "I/O Ports" in the Window menu to open the settings interface:

The current pins are assigned by the software and need to be modified.

　　There are 4 red LEDs and 3 RGB LEDs available on the Perf-V board, so I will use the 4 red ones. Check the circuit diagram to find the pins to which the LEDs are connected.

LEDs correspond to the four pins M16, N16, P15, and P16. In addition, the 50MHz crystal clock signal SYS_CLK is connected to N14, which is also needed. Specify these pins in Vivado and select 3.3V LVCMOS as the voltage standard.

　　Do the Implementation again, and then you can go to the next step to generate the binary code stream file required by FPGA.

　　Finally, download the code stream to the board to make the FPGA work. The FPGA is configured through JTAG. Pengfeng Technology provides a downloader, one end of which is inserted into the JTAG socket of the development board and the other end is connected to the computer via USB. Although Linux can detect the chip of the downloader, Vivado cannot recognize it yet and needs to "install the driver" - for Linux, it is not actually installing the driver, but making a small change in the system configuration. There is a script file in the Vivado installation directory, which can be executed as root.

　　Open "Hardware Manager" in Vivado, and when the downloader is recognized, you can see the connected FPGA device information. At this time, click "Program Device" and a dialog box will appear.

This is used to confirm the bit stream file (that is, the .bit file obtained from the Verilog source code in the previous process). Click "Program" to download it to the FPGA immediately, and you can see the LED changes.

　　Although the logic described in this project is very simple, the Vivado software gives me the feeling that it is really slow. The compilation speed of Altera Quartus 9.0, which I used ten years ago, is not of the same order of magnitude as it. The FPGA synthesis software interface and operation style of each manufacturer are different, but the basic process is similar. There is no other choice for the problem of slowness.

Jacktang

The FPGA development board with Arduino interface is pretty good, you can try a variety of experiences