The impact of common mode noise on EMI

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The impact of common mode noise on EMI [Copy link]

Most conducted EMI problems are caused by common-mode noise. And, most common-mode noise problems are caused by parasitic capacitance in the power supply. For Part 1 of this discussion topic, we focus on what happens when parasitic capacitance is coupled directly to the power supply input wires.
　　1. It only takes a few fF of stray capacitance to cause an EMI scan to fail. By nature, switching power supplies have nodes that provide high dV/dt. The combination of parasitic capacitance and high dV/dt creates EMI problems. When the other end of the parasitic capacitance is connected to the power supply input, a small amount of current is pumped directly into the power supply line.
　　2. Look at the parasitic capacitance in the power supply. We all remember from physics class that the capacitance between two conductors is proportional to the surface area of the conductors and inversely proportional to the distance between them. Look at each node in the circuit and pay special attention to the nodes with high dV/dt. Think about how much surface area that node has in the circuit layout and how far away the node is from the board input lines. The drain of the switching MOSFET and the snubber circuit are common culprits.
　　3. There are tricks to reducing the surface area. Try to use surface mount packages whenever possible. FETs in upright TO-220 packages have a large drain tab surface area, which unfortunately often happens to be the node with the highest dV/dt. Try using surface mount DPAK or D2PAK FETs instead. Placing a primary ground plane on the lower PCB below the DPAK tab will provide a good shielding of the bottom of the FET, which can significantly reduce parasitic capacitance.
　　Sometimes surface area is needed for heat dissipation. If you must use a TO-220 type FET with a heat sink, try connecting the heat sink to the primary ground (not the earth ground). This will not only help shield the FET, but also help reduce stray capacitance.
　　4. Keep the switch node away from the input connection. See Figure 1 for a design example where I ignored this simple rule.

　　Figure 1. Routing input lines too close to nodes with high dV/dt can increase conducted EMI.
　　I reduced the noise by about 6dB by simply adjusting the board (no circuit changes). See the measured results in Figures 2 and 3. In some cases, routing input lines close to high dV/dt can even kill the common mode coil (CMC).

　　Figure 2. EMI scan from a circuit board layout where the AC input is close to the switching circuit.

　

　Figure 3. EMI scan from board layout with large distance between AC input and switching circuit
　　Have you ever experienced little or no EMI improvement after significantly strengthening the input filter? This is most likely because there is some stray capacitance from a high dV/dt node coupling directly to the input line, effectively bypassing your CMC. To detect this, temporarily short the windings of the CMC on the PCB and place a secondary CMC in series with the board's input wires. If there is a significant improvement, you need to re-layout the board and pay close attention to the placement and routing of the input connections.