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Questions about multi-channel schematic connection [Copy link]

The 16-channel current amplifier circuit drawing is called 16 times. I don’t know where the connection is wrong and the compilation always fails.

[Error] DETECTOR ARRAY1.SchDoc Compiler Duplicate Net Names Wire Net*_singledetector11_5 9:53:27 2019/7/20 66

I know what this error means, but I don't know how to fix it. I hope you can give me some advice. Thank you.

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Generally, the main diagram and sub-diagram are matched. When adding a sub-diagram to the main diagram, design--HDL file or drawing to generate sheet symbols, select the sub-diagram to add Place sheet symbol There must be an add sheet entry entry symbol in the main diagram   Details Published on 2019-7-20 11:29
 

2w

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I didn't see what was wrong.

1. In the properties of the chart symbol, the names of the main chart and the 16-channel sub-charts are the same

2. Or whether the component library is added to the project

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Are you saying that the reason for my error is that the names of the main image and the sub-image are the same? But that's not the case. I think the error he said is that the labels of the resistors and capacitors in each sub-image are the same, but I just called the same image 16 times, so of course it's the same. This cannot be modified. The component library has been added to the project.  Details Published on 2019-7-22 10:34
 
 

2w

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Generally, the main diagram and sub-diagram are matched. When adding a sub-diagram to the main diagram, design--HDL file or drawing to generate sheet symbols, select the sub-diagram to add
Place sheet symbol
There must be an add sheet entry entry symbol in the main diagram

This post is from PCB Design

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My problem is solved. The network number of the wire must be consistent with the subgraph port number. Thank you for your answer.  Details Published on 2019-7-22 16:05
 
 
 

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qwqwqw2088 posted on 2019-7-20 10:59 I can't figure out what the error is. 1. In the properties of the chart symbol, the names of the main chart and the 16-channel sub-chart are the same. 2. Or is it whether the component library has been added to the work...

Are you saying that the reason for my error is that the names of the main image and the sub-image are the same? But that's not the case. I think the error he said is that the labels of the resistors and capacitors in each sub-image are the same, but I just called the same image 16 times, so of course it's the same. This cannot be modified. The component library has been added to the project.

This post is from PCB Design
 
 
 

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qwqwqw2088 posted on 2019-7-20 11:29 Generally, the main diagram and the sub-diagram are matched. When adding a sub-diagram to the main diagram, design--HDL file or drawing to generate a sheet symbol, select the sub-diagram and add the placement sheet s ...

My problem is solved. The network number of the wire must be consistent with the subgraph port number. Thank you for your answer.

This post is from PCB Design
 
 
 

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