MSP430 JTAG pin diagram

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MSP430 JTAG pin diagram [Copy link]

JTAG pin definition description The JTAG interface mainly includes 5 pins: TMS, TCK, TDI, TDO and an optional pin TRST. These pins are used to drive the circuit module and control the execution of specified operations. The functions of each pin are as follows: 1. TCK (Test Clook) This is the test clock of JTAG, which provides a test reference for the TAP controller and registers. Data and instructions are serially input or shifted out through the TDI and TDO pins under the synchronization of TCK. At the same time, TCK provides a clock for the TAP controller state machine. 2. TMS (Test Mode Selector) TAP control mode selector, uses the state of TMS at the rising edge of TCK to determine the state of the TAP controller. 3. TDI (Test Data Input) It is the serial data input terminal of the JTAG instruction and data registers. It is specified by the TAP controller, the current state, and the specific instruction held in the instruction register to load which register into which a specific operation is performed. It is sampled at the rising edge of TCK and the result is sent to the JTAG register group. 4. TDO (Test Data Output) It is the serial data output terminal of the JTAG instruction and data registers. The current state of the TAP controller and the specific instruction held in the instruction register determine which register's content is sent to the TDO output in a particular operation. For any known operation, only one register between TDI and TDO can be in a valid connection state. 5. TRST This is the test reset input signal, which is valid at low level and provides asynchronous initialization signal for the TAP controller. How to use is shown in Figure 1 In actual use, you can just use RST, TDO, TDI, TMS, TCK, and then connect Vcc and GND, so there is no need to use IDC-14.